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DS2778G+T&RMAXIMN/a498avai2-Cell, Stand-Alone, Li+ Fuel-Gauge IC with Protector and Optional SHA-1 Authentication


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DS2778G+T&R
2-Cell, Stand-Alone, Li+ Fuel-Gauge IC with Protector and Optional SHA-1 Authentication
General Description
The DS2775–DS2778 report available capacity for
rechargeable lithium-ion (Li+) and Li+ polymer (Li-Poly)
batteries in mAh and as a percentage of full. Safe oper-
ation is ensured by the integrated Li+ protector. The
DS2776/DS2778 support SHA-1-based challenge-
response authentication in addition to all other DS2775/
DS2777 features.
Precision measurements of voltage, temperature, and
current, along with a cell characteristics table and
application parameters, are used for capacity estima-
tion calculations. The capacity registers report a con-
servative estimate of the amount of charge that can be
removed given the current temperature, discharge rate,
stored charge, and application parameters.
The DS2775–DS2778 operate from +4.0V to +9.2V for
direct integration into battery packs with two Li+ or Li-
Poly cells.
In addition to nonvolatile storage for cell compensation
and application parameters, the DS2775–DS2778 offer
16 bytes of EEPROM for use by the host system and/or
pack manufacturer to store battery lot and date tracking
information. The EEPROM can also be used for non-
volatile storage of system and/or battery usage statis-
tics. A Maxim 1-Wire®(DS2775/DS2776) or 2-wire
(DS2777/DS2778) interface provides serial communica-
tion to access measurement and capacity data regis-
ters, control registers, and user memory. The
DS2776/DS2778 use the SHA-1 hash algorithm in a
challenge-response pack authentication protocol for
battery-pack verification.
Applications

Low-Cost Notebooks
UMPCs
DSLR Cameras
Video Cameras
Commercial and Military Radios
Portable Medical Equipment
Features
High-Side nFET Drivers and Protection CircuitryPrecision Voltage, Temperature, and Current
Measurement System
Cell-Capacity Estimation from Coulomb Count,
Discharge Rate, Temperature, and Cell
Characteristics
Estimates Cell Aging Between Learn CyclesUses Low-Cost Sense ResistorAllows Calibration of Gain and Temperature
Coefficient
Programmable Thresholds for Overvoltage and
Overcurrent
Pack Authentication Using SHA-1 Algorithm
(DS2776/DS2778)
32-Byte Parameter EEPROM16-Byte User EEPROMMaxim 1-Wire Interface with 64-Bit Unique ID
(DS2775/DS2776)
2-Wire Interface with 64-Bit Unique ID
(DS2777/DS2778)
3mm x 5mm, 14-Pin TDFN Lead-Free Package
DS2775/DS2776/DS2777/DS2778
2-Cell, Stand-Alone, Li+ Fuel-Gauge IC with
Protector and Optional SHA-1 Authentication
Ordering Information

19-4688; Rev 4; 6/11
PART PIN-PACKAGE TOP MARK
DS2775G+ 14 TDFN-EP*
D2775
DS2775G+T&R 14 TDFN-EP* D2775
DS2776G+ 14 TDFN-EP*
D2776
DS776G+T&R 14 TDFN-EP* D2776
DS2777G+ 14 TDFN-EP*
D2777
DS2777G+T&R 14 TDFN-EP* D2777
DS2778G+ 14 TDFN-EP*
D2778
DS2778G+T&R 14 TDFN-EP* D2778
Note:
All devices are specified over the -20°C to +70°C oper-
ating temperature range.
+Denotes a lead(Pb)-free/RoHS-compliant package.
T&R = Tape and reel.
*EP = Exposed pad.Selector Guide appears at end of data sheet.
1-Wire is a registered trademark of Maxim Integrated Products, Inc.
DS2775/DS2776/DS2777/DS2778
2-Cell, Stand-Alone, Li+ Fuel-Gauge IC with
Protector and Optional SHA-1 Authentication
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS

(VDD= +4.0V to +9.2V, TA= -20°C to +70°C, unless otherwise noted. Typical values are at TA= +25°C.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Voltage Range on PLS, CP, CC, DC Pins
Relative to VSS.....................................................-0.3V to +18V
Voltage Range on VDD, VIN1, VIN2, SRC Pins
Relative to VSS....................................................-0.3V to +9.2V
Voltage Range on All Other Pins Relative to VSS..-0.3V to +6.0V
Continuous Sink Current, PIO, DQ......................................20mA
Continuous Sink Current, CC, DC.......................................10mA
Operating Temperature Range...........................-20°C to +70°C
Storage Temperature Range.............................-55°C to +125°C
Lead Temperature (soldering, 10s).................................+300°C
Soldering Temperature (reflow).......................................+260°C
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

Sleep mode, TA +50°C 3 5 IDD0 Sleep mode, TA> +50°C 10
IDD1 Active mode 80 135 Supply Current
IDD2 Active mode during SHA-1 computation 120 300
μA
Temperature Accuracy TERR -3 +3 °C
2.0V  VIN1 4.6V, 2.0V  (VIN2 - VIN1)
4.6V, 0°C  TA +50°C-35 +35
2.0V  VIN1 4.6V, 2.0V  (VIN2 – VIN1)
4.6V, TA = +25°C -22 22 Voltage Accuracy
2.0V  VIN1 4.6V, 2.0V  (VIN2 - VIN1) 4.6V -50 +50
mV
Input Resistance (VIN1, VIN2) 15 M
Current Resolution ILSB 1.56 μV
Current Full Scale IFS -51.2 +51.2 mV
Current Gain Error IGERR -1 +1 % FS
Current Offset IOERR 0°C  TA +70°C (Note 1) -9.375 9.375 μVh
Accumulated Current Offset qOERR 0°C  TA +70°C (Note 1) -255 0 μVh/Day
0°C  TA +50°C -2 +2 Time-Base Error tERR
-3 +3
CP Output Voltage (VCP - VSRC) VGS IOUT = 0.9μA 4.4 4.7 5 V
CP Startup Time tSCP CE = 0, DE = 0, CCP = 0.1μF, active mode 200 ms
Output High: CC, DC VOHCP IOH = 100μA (Note 2) VCP - 0.4 V
Output Low: CC VOLCC IOL = 100μA VSRC + 0.1 V
Output Low: DC VOLDC IOL = 100μA VSRC + 0.1 V
DQ, PIO Voltage Range -0.3 +5.5 V
DQ, PIO, SDA, SCL Input
Logic-High VIH 1.5 V
DQ, PIO, SDA, SCL Input
Logic-Low VIL 0.6 V
OVD Input Logic-High VIH VBAT - 0.2 V
OVD Input Logic-Low VIL VSS + 0.2 V
DS2775/DS2776/DS2777/DS2778
2-Cell, Stand-Alone, Li+ Fuel-Gauge IC with
Protector and Optional SHA-1 Authentication
ELECTRICAL CHARACTERISTICS (continued)

(VDD= +4.0V to +9.2V, TA= -20°C to +70°C, unless otherwise noted. Typical values are at TA= +25°C.)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

DQ, PIO, SDA Output Logic-Low VOL IOL = 4mA 0.4 V
DQ, PIO Pullup Current IPU Sleep mode, VPIN = (VDD - 0.4V) 30 100 200 nA
DQ, PIO, SDA, SCL Pulldown
Current IPD Active mode, VPIN = 0.4V 30 100 200 nA
DQ Input Capacitance CDQ 50 pF
DQ Sleep Timeout tSLEEP DQ < VIL 2 9 s
PIO, DQ Wake Debounce tWDB Sleep mode 100 ms
SHA-1 COMPUTATION TIMING (DS2776/DS2778 ONLY)

(VDD= +4.0V to +9.2V, TA= 0°C to +70°C, unless otherwise noted. Typical values are at TA= +25°C.)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

Computation Time tCOMP 30 ms
ELECTRICAL CHARACTERISTICS: PROTECTION CIRCUIT

(VDD= +4.0V to +9.2V, TA= 0°C to +50°C, unless otherwise noted. Typical values are at TA= +25°C.)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

VOV = 1110111b 4.438 4.473 4.508 Overvoltage Detect VOV VOV = 1100011b 4.242 4.277 4.312 V
Charge-Enable Voltage VCE Relative to VOV -100 mV
Undervoltage Detect VUV Programmable in Control register 0x60h,
UV[1:0] = 10 2.415 2.450 2.485 V
OC = 11b -60 -75 -90 Overcurrent Detect: Charge VCOC
OC = 00b -12.5 -25 -38
mV
OC = 11b 80 100 120 Overcurrent Detect: Discharge VDOC OC = 00b 25 38 50 mV
SC =1b 240 300 360 Short-Circuit Current Detect VSC SC = 0b 120 150 180 mV
Overvoltage Delay tOVD (Note 3) 600 1400 ms
Undervoltage Delay tUVD (Note 3) 600 1400 ms
Overcurrent Delay tOCD 8 10 12 ms
Short-Circuit Delay tSCD 80 120 160 μs
Charger-Detect Hysteresis VCDVUV condition 50 mV
Test Threshold VTP COC, DOC condition 0.4 1.0 1.2 V
DOC condition 20 40 80 Test Current ITST COC condition -45 -60 -95 μA
PLS Pulldown Current IPPD Sleep mode 200 400 630 μA
Recovery Current IRC VUV condition, max: VPLS = 15V, VDD = 1.4V;
min: VPLS = 4.2V, VDD = 2V 3.3 8 13 mA
DS2775/DS2776/DS2777/DS2778
2-Cell, Stand-Alone, Li+ Fuel-Gauge IC with
Protector and Optional SHA-1 Authentication
EEPROM RELIABILITY SPECIFICATION

(VDD= +4.0V to +9.2V, TA= -20°C to +70°C, unless otherwise noted.)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

EEPROM Copy Time tEEC 10 ms
EEPROM Copy Endurance NEEC TA = +50°C 50,000 Cycles
ELECTRICAL CHARACTERISTICS: 1-Wire INTERFACE, STANDARD (DS2775/DS2776 ONLY)

(VDD= +4.0V to +9.2V, TA= -20°C to +70°C.)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

Time Slot tSLOT 60 120 μs
Recovery Time tREC 1 μs
Write-Zero Low Time tLOW0 60 120 μs
Write-One Low Time tLOW1 1 15 μs
Read Data Valid tRDV 15 μs
Reset Time High tRSTH 480 μs
Reset Time Low tRSTL 480 960 μs
Presence-Detect High tPDH 15 60 μs
Presence-Detect Low tPDL 60 240 μs
ELECTRICAL CHARACTERISTICS: 1-Wire INTERFACE, OVERDRIVE (DS2775/DS2776 ONLY)

(VDD= +4.0V to +9.2V, TA= -20°C to +70°C.)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

Time Slot tSLOT 6 16 μs
Recovery Time tREC 1 μs
Write-Zero Low Time tLOW0 6 16 μs
Write-One Low Time tLOW1 1 2 μs
Read Data Valid tRDV 2 μs
Reset Time High tRSTH 48 μs
Reset Time Low tRSTL 48 80 μs
Presence-Detect High tPDH 2 6 μs
Presence-Detect Low tPDL 8 24 μs
DS2775/DS2776/DS2777/DS2778
2-Cell, Stand-Alone, Li+ Fuel-Gauge IC with
Protector and Optional SHA-1 Authentication
ELECTRICAL CHARACTERISTICS: 2-WIRE INTERFACE (DS2777/DS2778 ONLY)

(VDD= +4.0V to +9.2V, TA= -20°C to +70°C.)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

SCL Clock Frequency fSCL (Note 4) 0 400 kHz
Bus-Free Time Between a STOP
and START Condition tBUF 1.3 μs
Hold Time (Repeated) START
Condition tHD:STA (Note 5) 0.6 μs
Low Period of SCL Clock tLOW 1.3 μs
High Period of SCL Clock tHIGH 0.6 μs
Setup Time for a Repeated
START Condition tSU:STA 0.6 μs
Data Hold Time tHD:DAT (Notes 6, 7) 0 0.9 μs
Data Setup Time tSU:DAT (Note 6) 100 ns
Rise Time of Both SDA and SCL
Signals tR20 +
0.1CB 300 ns
Fall Time of Both SDA and SCL
Signals tF20 +
0.1CB 300 ns
Setup Time for STOP Condition tSU:STO 0.6 μs
Spike Pulse Widths Suppressed
by Input Filter tSP (Note 8) 0 50 ns
Capacitive Load for Each Bus
Line CB (Note 9) 400 pF
SCL, SDA Input Capacitance CBIN 60 pF
Note 1:
Accumulation bias and offset bias registers set to 00h. NBEN bit set to 0.
Note 2:
Measurement made with VSRC= +8V, VGSdriven with external +4.5V supply.
Note 3:
Overvoltage (OV) and undervoltage (UV) delays (tOVD, tUVD) are reduced to zero seconds if the OV or UV condition is
detected within 100ms of entering active mode.
Note 4:
Timing must be fast enough to prevent the DS2777/DS2778 from entering sleep mode due to bus low for period > tSLEEP.
Note 5:
fSCLmust meet the minimum clock low time plus the rise/fall times.
Note 6:
The maximum tHD:DATneed only be met if the device does not stretch the low period (tLOW) of the SCL signal.
Note 7:
This device internally provides a hold time of at least 75ns for the SDA signal (referred to the VIHMINof the SCL signal) to
bridge the undefined region of the falling edge of SCL.
Note 8:
Filters on SDA and SCL suppress noise spikes at the input buffers and delay the sampling instant.
Note 9:
CBis total capacitance of one bus line in pF.
DS2775/DS2776/DS2777/DS2778
2-Cell, Stand-Alone, Li+ Fuel-Gauge IC with
Protector and Optional SHA-1 Authentication
Typical Operating Characteristics

(TA = +25°C, unless otherwise noted.)
DISCHARGE-OVERCURRENT
PROTECTION DELAY

DS2775/6/7/8 toc01
DC FET
GATE
2V/div
2V/div
1V/div
20mV/div
DC FET
SOURCE
VGS
VSNS 25mΩ
SENSE RESISTOR
WITH DISCHARGE-
OVERCURRENT
THRESHOLD = 38mV
TIME (ms)161412108642020
CC FET GATE TURN-OFF DURING
CHARGE-OVERCURRENT EVENT

DS2775/6/7/8 toc02
CC FET
GATE2V/div
2V/div
1V/div
20mV/div
CC FET
SOURCE
VGS CC FET
VSNS 25mΩ
SENSE RESISTOR
WITH CHARGE-
OVERCURRENT
THRESHOLD = 25mV
TIME (μs)403530252015105050
DC FET GATE TURN-OFF DURING
SHORT-CIRCUIT EVENT

DS2775/6/7/8 toc03
DC FET
GATE
2V/div
2V/div
1V/div
50mV/div
DC FET
SOURCE
VGS DC FET
VSNS 25mΩ
SENSE RESISTOR
WITH SHORT-CIRCUIT
THRESHOLD = 150mV
TIME (μs)161412108642020
SHORT-CIRCUIT PROTECTION
DELAY

DS2775/6/7/8 toc04
DC FET
GATE
2V/div
2V/div
1V/div
100mV/div
DC FET
SOURCE
VGS DC FET
VSNS 25mΩ
SENSE RESISTOR
WITH SHORT-CIRCUIT
THRESHOLD = 150mV
TIME (μs)
VOLTAGE MEASUREMENT
ACCURACY
DS2775/6/7/8 toc05
VINX (V)
ACCURACY (mV)321
+70°C
-20°C
+25°C
CHARGE-PUMP STARTUP EXITING SLEEP
MODE (VDD = 8V NO LOAD ON PK+)

DS2775/6/7/8 toc06
TIME (ms)
VOLTAGE (V)8010203050604070100
2.75V
12.6V
DS2775/DS2776/DS2777/DS2778
2-Cell, Stand-Alone, Li+ Fuel-Gauge IC with
Protector and Optional SHA-1 Authentication
CURRENT MEASUREMENT
ACCURACY

DS2775/6/7/8 toc07
VSNS (mV)
ACCURACY (
+70°C
-20°C
+25°C
IRC vs. VDD

DS2775/6/7/8 toc08
VDD (V)
IRC
(mA)4321
1kΩ RESISTOR FROM PLS TO PK+
CURRENT MEASUREMENT OFFSET
vs. TEMPERATURE

DS2775/6/7/8 toc09
TEMPERATURE (°C)
LSB (1.562540200
Typical Operating Characteristics (continued)
(TA = +25°C, unless otherwise noted.)
DS2775/DS2776/DS2777/DS2778
2-Cell, Stand-Alone, Li+ Fuel-Gauge IC with
Protector and Optional SHA-1 Authentication
Pin Description
PINNAMEFUNCTION
CC Charge Control. Charge FET control output.
2 VDD Chip-Supply Input. Bypass with 0.1μF to VSS.DC Discharge Control. Discharge FET control output.
4 VIN2Battery Voltage Sense Input 2. Connect to highest voltage potential positive cell terminal through
decoupling network.
5 VIN1Battery Voltage Sense Input 1. Connect to lowest voltage potential positive cell terminal through
decoupling network. VB Regulated Operating Voltage. Bypass with 0.1μF to VSS.
7 VSS Device Ground. Chip ground and battery-side sense resistor input. SNS Sense Resistor Connection. Pack-side sense resistor sense input. PIO Programmable I/O. Can be configured as wake input.
10 PLS Pack Plus Terminal Sense Input. Used to detect the removal of short-circuit, discharge overcurrent, and
charge overcurrent conditions.
11 SDA/DQ Data Input/Output. Serial data I/O, includes weak pulldown to detect system disconnect and can be
configured as wake input for 1-Wire devices.
12 SCL/OVD Serial Clock Input/Overdrive Select. Communication clock for 2-wire devices/overdrive select pin for
1-Wire devices.
13 SRC Protection MOSFET Source Connection. Used as a reference for the charge pump.
14 CP Charge Pump Output. Generates gate drive voltage for protection FETs. Bypass with 0.47μF to SRC. EP Exposed Pad. Connect to ground or leave unconnected.
TOP VIEW
TDFN(3mm × 5mm)
CCVDDDCVIN2VIN1VBVSSCPSRCSCL/OVDSDA/DQPLSPIOSNS
DS2775
DS2776
DS2777
DS2778
Pin Configuration
DS2775/DS2776/DS2777/DS2778
Block Diagram

Li+
PROTECTOR
POWER-MODE
CONTROL
VOLTAGE
CURRENT
10-BIT + SIGN
ADC/MUX
FuelPack™
ALGORITHM
FET DRIVERS
CHARGE
PUMP
15-BIT + SIGN
ADC
TEMPERATURE
PRECISION ANALOG
OSCILLATORVREF
PIN
DRIVERS
AND
POWER
SWITCH
CONTROL
PIO LOGIC
COMMUNICATION
INTERFACE
DS2775–DS2778
CONTROL AND
STATUS REGISTERS
16-BYTE USER
EEPROM
32-BYTE
PARAMETER
EEPROM
PLS
VOLTAGE
REGULATOR
VDD
VB INTERNAL
VIN2
VIN1
SNS
SDA/DQ
SCL/OVD
PIO
VSS
FuelPack is a trademark of Maxim Integrated Products, Inc.
2-Cell, Stand-Alone, Li+ Fuel-Gauge IC with
Protector and Optional SHA-1 Authentication
DS2775/DS2776/DS2777/DS2778
2-Cell, Stand-Alone, Li+ Fuel-Gauge IC with
Protector and Optional SHA-1 Authentication
DS2775/DS2776 Typical Application Circuit

DS2775
DS2776
PLS
PIO
VDD
VIN2
VIN1
VSSOVDSNS
SRCSRCDC
1kΩ
150Ω
RSNS
1kΩ1kΩ150Ω1kΩ1kΩ470Ω
PK+
PK-
DATA
0.1μF
0.47μF
0.1μF5.1V
DS2777/DS2778 Typical Application Circuit

DS2777
DS2778
PLS
SDA
PIO
SCL
VDD
VIN2
VIN1
VSSSNS
SRCSRCDC
1kΩ
150Ω
RSNS
1kΩ1kΩ150Ω1kΩ1kΩ470Ω
PK+
PK-
SDA
150Ω
SCL
0.1μF
0.47μF
0.1μF5.1V5.1V
DS2775/DS2776/DS2777/DS2778
2-Cell, Stand-Alone, Li+ Fuel-Gauge IC with
Protector and Optional SHA-1 Authentication
Detailed Description

The DS2775–DS2778 function as an accurate fuel
gauge, Li+ protector, and SHA-1-based authentication
token (SHA-1-based authentication available only on
the DS2776/DS2778). The fuel gauge provides accu-
rate estimates of remaining capacity and reports timely
voltage, temperature, and current measurement data.
Capacity estimates are calculated from a piecewise lin-
ear model of the battery performance over load and
temperature along with system parameters for charge
and end-of-discharge conditions. The algorithm para-
meters are user programmable and can be modified
within the pack. Critical capacity and aging data are
periodically saved to EEPROM in case of short-circuit
or deep-depletion events.
The Li+ protection function ensures safe, high-perfor-
mance operation. nFET protection switches are driven
with a charge pump that maintains gate drive as the
cell voltage decreases. The high-side topology pre-
serves the ground path for serial communication while
eliminating the parasitic charge path formed when the
fuel-gauge IC is located inside the protection FETs in a
low-side configuration. The thresholds for overvoltage,
undervoltage, overcurrent, and short-circuit current are
user programmable for customization to each cell and
application.
The 32-bit-wide SHA-1 engine with 64-bit secret and
64-bit challenge words resists brute force and other
attacks with financial-level HMAC security. The chal-
lenge of managing secrets in the supply chain is
addressed with the compute next secret feature. The
unique serial number or ROM ID can be used to assign
a unique secret to each battery.
Power Modes

The DS2775–DS2778 have two power modes: active
and sleep. On initial power-up, the DS2775–DS2778
default to active mode. In active mode, the DS2775–
DS2778 are fully functional with measurements and
capacity estimation registers continuously updated.
The protector circuit monitors battery pack, cell volt-
ages, and battery current for safe conditions. The pro-
tection FET gate drivers are enabled when conditions
are deemed safe. Also, the SHA-1 authentication func-
tion is available in active mode. When an SHA-1 com-
putation is performed, the supply current increases to
IDD2for tSHA. In sleep mode, the DS2775–DS2778 con-
serve power by disabling measurement and capacity
estimation functions, but preserve register contents.
Gate drive to the protection FETs is disabled in sleep;
the SHA-1 authentication feature is not operational.
The IC enters sleep mode under two different condi-
tions: bus low and undervoltage. An enable bit makes
entry into sleep optional for each condition. Sleep mode
is not entered if a charger is connected (VPLS> VDD+
VCD) or if a charge current of 1.6mV/RSNSmeasured
from SNS to VSS. The DS2775–DS2778 exit sleep mode
upon charger connection or a low-to-high transition on
any communication line. The bus-low condition, where
all communication lines are low for tSLEEP, indicates
pack removal or system shutdown in which the bus
pullup voltage, VPULLUP, is not present. The power
mode (PMOD) bit must be set to enter sleep when a
bus-low condition occurs. After the DS2775–DS2778
enter sleep due to a bus-low condition, it is assumed
that no charge or discharge current flows and that
coulomb counting is unnecessary.
The second condition to enter sleep is an undervoltage
condition, which reduces battery drain due to the
DS2775–DS2778 supply current and prevents overdis-
charging the cell. The DS2775–DS2778 transition to
sleep mode if the VIN1or VIN2voltage is less than VUV
and the undervoltage enable (UVEN) bit is set. The
communication bus must be in a static state, that is,
with DQ (SDA and SCL for 2-wire) either high or low for
tSLEEP. The DS2775–DS2778 transition from sleep
mode to active mode when DQ (SDA and SCL for
2-wire) changes logic state. See Figures 1 and 2 for
more information on sleep-mode state.
The DS2775–DS2778 have a “power switch” capability
for waking the device and enabling the protection FETs
when the host system is powered down. A simple dry
contact switch on the PIO pin or DQ pin can be used to
wake up the battery pack. The power-switch function is
enabled using the PSPIO and PSDQ configuration bits
in the Control register.
When PSPIO or PSDQ are set and sleep mode is
entered through the PMOD condition*, the PIO and DQ
pins pull high, respectively. Sleep mode is exited upon
the detection of a low-going transition on PIO or DQ.
PIO has a 100ms debounce period to filter out glitches
that can be caused when a sleeping battery is inserted
into a system.
*The “power switch” feature is disabled if sleep mode is
DS2775/DS2776/DS2777/DS2778
2-Cell, Stand-Alone, Li+ Fuel-Gauge IC with
Protector and Optional SHA-1 Authentication
Li+ Protection Circuitry

During active mode, the DS2775–DS2778 constantly
monitor SNS, VIN1, VIN2, and PLS to protect the battery
from overvoltage (overcharge), undervoltage (overdis-
charge), and excessive charge and discharge currents
(overcurrent, short circuit). Table 1 summarizes the
conditions that activate the protection circuit, the
response of the DS2775–DS2778, and the thresholds
that release the DS2775–DS2778 from a protection
state. Figure 3 shows Li+ protection circuitry example
waveforms.
Overvoltage (OV)

If either of the voltages on (VIN2- VIN1) or (VIN1- VSS)
exceeds the overvoltage threshold, VOV, for a period
longer than overvoltage delay, tOVD, the CC pin is dri-
ven low to shut off the external charge FET. The DC out-
put remains high during overvoltage to allow
discharging. When (VIN2 - VIN1) and (VIN1 - VSS) falls
below the charge-enable threshold, VCE, the
DS2775–DS2778 turn the charge FET on by driving CC
high. The DS2775–DS2778 drive CC high before
[(VIN2-VIN1) and (VIN1- VSS)] < VCEif a discharge
condition persists with VSNS ≥1.2mV and [(VIN2- VIN1)
and (VIN1- VSS)] < VOV.
ACTIVE

PMOD = 0
UVEN = 0
SLEEP

PSPIO = 0
PSDQ = 0
RISING EDGE ON DQ
CHARGER DETECT
PULL DQ LOW
CHARGER DETECT
ACTIVE

PMOD = 0
UVEN = 1
SLEEP

PSPIO = 0
PSDQ = 1
VIN1 OR VIN2 < VUV
PULL PIO LOW
RISING EDGE ON DQ
CHARGER DETECT
ACTIVE

PMOD = 1
UVEN = 0
SLEEP

PSPIO = 1
PSDQ = 0
PULL DQ LOW FOR tSLEEP
PULL DQ LOW FOR tSLEEP
PULL DQ LOW
PULL PIO LOW
CHARGER DETECT
ACTIVE

PMOD = 1
UVEN = 1
SLEEP

PSPIO = 1
PSDQ = 1
VIN1 OR VIN2 < VUV
Figure 1. Sleep-Mode State Diagram for DS2775/DS2776
ACTIVE

PMOD = 0
UVEN = 0
SLEEP

PSPIO = 0
PSDQ = X
RISING EDGE ON SDA OR SCL
CHARGER DETECT
VIN1 OR VIN2 < VUV
CHARGER DETECT
ACTIVE

PMOD = 0
UVEN = 1
SLEEP

PSPIO = 0
PSDQ = X
RISING EDGE ON SDA OR SCL
PULL PIO LOW
CHARGER DETECT
PULL SDA AND SCL LOW
FOR tSLEEP
ACTIVE

PMOD = 1
UVEN = 0
SLEEP

PSPIO = 1
PSDQ = X
RISING EDGE ON SDA OR SCL
PULL SDA AND SCL LOW
FOR tSLEEP
PULL PIO LOW
CHARGER DETECT
VIN1 OR VIN2 < VUV
ACTIVE

PMOD = 1
UVEN = 1
SLEEP

PSPIO = 1
PSDQ = X
RISING EDGE ON SDA OR SCL
Figure 2. Sleep-Mode State Diagram for DS2777/DS2778
DS2775/DS2776/DS2777/DS2778
2-Cell, Stand-Alone, Li+ Fuel-Gauge IC with
Protector and Optional SHA-1 Authentication
ACTIVATION CONDITION THRESHOLD DELAY RESPONSE RELEASE THRESHOLD

Overvoltage (OV) (Note 1) VCELL > VOV tOVD CC Off
Both VCELL < VCE or
(VSNS 1.2mV and both
VCELL < VOV) (Note 1)
Undervoltage (UV) (Note 1) VCELL < VUV tUVDCC Off, DC Off,
Sleep Mode (Note 2)
VPLS > VIN2 (charger connected)
or (both VCELL > VUV and
UVEN = 0) (Note 3)
Overcurrent, Charge (COC) VSNS < VCOC tOCD CC Off, DC Off VPLS < VDD – VTP
(charger removed) (Note 4)
Overcurrent, Discharge
(DOC) VSNS > VDOC tOCD DC Off VPLS > VDD – VTP
(load removed) (Note 5)
Short Circuit (SC) VSNS > VSC tSCD DC Off VPLS > VDD – VTP (Note 5)
Table 1. Li+ Protection Conditions and DS2775/DS2776 Responses
Note 1:
VCELLis defined as (VIN1- VSS) or (VIN2- VIN1).
Note 2:
Sleep mode is only entered if UVEN = 1.
Note 3:
If VCELL< VUVwhen a charger connection is detected, release is delayed until VCELL≥VUV. The recovery charge path pro-
vides an internal current limit (IRC) to safely charge the battery.
Note 4:
With test current IPPDflowing from PLS to VSS(pulldown on PLS) enabled.
Note 5:
With test current ITSTflowing from VDDto PLS (pullup on PLS).
VOV
VCE
VUV
VIN
VSNS
-VCOC
VDOC
VSC
tOVDtOVDtOCDtUVD
tUVDtOCDtSCO
DISCHARGE
CHARGE
POWER
MODE
ACTIVE
SLEEP*
*IF UVEN = 1.
VOHCC
VCP
VDD
VCP
VPLS
Figure 3. Li+ Protection Circuitry Example Waveforms
DS2775/DS2776/DS2777/DS2778
2-Cell, Stand-Alone, Li+ Fuel-Gauge IC with
Protector and Optional SHA-1 Authentication
Undervoltage (UV)

If the average of the voltages on (VIN2- VIN1) or
(VIN1- VSS) drops below the undervoltage threshold,
VUV, for a period longer than undervoltage delay, tUVD,
the DS2775–DS2778 shut off the charge and discharge
FETs. If UVEN is set, the DS2775–DS2778 also enter
sleep mode. When a charger is detected and VPLS>
VIN2, the DS2775–DS2778 provide a current-limited
recovery charge path (IRC) from PLS to VDDto gently
charge severely depleted cells. The recovery charge
path is enabled when 0 ≤[(VIN2- VIN1) and (VIN1-
VSS)] < VCE. The FETs remain off until (VIN2- VIN1) and
(VIN1- VSS) exceed VUV.
Overcurrent, Charge Direction (COC)

Charge current develops a negative voltage on VSNS
with respect to VSS. If VSNSis less than the charge
overcurrent threshold, VCOC, for a period longer than
overcurrent delay, tOCD, the DS2775–DS2778 shut off
both external FETs. The charge current path is not re-
established until the voltage on the PLS pin drops
below (VDD- VTP). The DS2775–DS2778 provide a test
current of value IPPDfrom PLS to VSS, pulling PLS
down, in order to detect the removal of the offending
charge current source.
Overcurrent, Discharge Direction (DOC)

Discharge current develops a positive voltage on VSNS
with respect to VSS. If VSNSexceeds the discharge
overcurrent threshold, VDOC, for a period longer than
tOCD, the DS2775–DS2778 shut off the external dis-
charge FET. The discharge current path is not reestab-
lished until the voltage on PLS rises above (VDD- VTP).
The DS2775–DS2778 provide a test current of value
ITSTfrom VDD to PLS, pulling PLS up, in order to detect
the removal of the offending low-impedance load.
Short Circuit (SC)

If VSNSexceeds short-circuit threshold, VSC, for a
period longer than short-circuit delay, tSCD, the
DS2775–DS2778 shut off the external discharge FET.
The discharge current path is not reestablished until
the voltage on PLS rises above (VDD- VTP). The
DS2775–DS2778 provide a test current of value ITST
from VDDto PLS, pulling PLS up, in order to detect the
removal of the short circuit.
All the protection conditions described are logic
ANDed to affect the CC and DC outputs.
CC = (overvoltage) AND(undervoltage) AND
(overcurrent, charge direction) AND(Protection register
bit CE = 0)
DC = (undervoltage) AND(overcurrent, either direction)
AND(short circuit) AND(Protection register bit
DE = 0)
Voltage Measurements

Cell voltages are measured every 440ms. The lowest
potential cell, VIN1, is measured with respect to VSS.
The highest potential cell, VIN2, is measured with
respect to VIN1. Battery voltages are measured with a
range of -5V to +4.9951V and a resolution of 4.8828mV
and placed in the Result register in two’s complement
form. Voltages above the maximum register value are
reported as 7FE0h.
MSB - ADDRESS 0Ch, VIN1 - VSSLSB - ADDRESS 0Dh, VIN1 - VSS
MSB - ADDRESS 1Ch, VIN2 - VIN1LSB - ADDRESS 1Dh, VIN2 - VIN1
S 29 28 27 26 25 24 2322 21 20 X X X X X
MSbLSbMSbLSb
“S”: SIGN BIT(S), “X”: RESERVEDUNITS: 4.883mV
Figure 4. Voltage Register Format
DS2775/DS2776/DS2777/DS2778
2-Cell, Stand-Alone, Li+ Fuel-Gauge IC with
Protector and Optional SHA-1 Authenticationemperature Measurement

The DS2775–DS2778 use an integrated temperature
sensor to measure battery temperature with a resolution
of 0.125°C. Temperature measurements are updated
every 440ms and placed in the Temperature register in
two’s complement form.
Current Measurement

In active mode, the DS2775–DS2778 continuously mea-
sure the current flow into and out of the battery by mea-
suring the voltage drop across a low-value current-sense
resistor, RSNS. The voltage-sense range between SNS
and VSSis ±51.2mV with a least significant bit (LSb) of
1.5625µV. The input linearly converts peak signal ampli-
tudes up to 102.4mV as long as the continuous signal
level (average over the conversion cycle period) does
not exceed ±51.2mV. The ADC samples the input differ-
entially at 18.6kHz and updates the Current register at
the completion of each conversion cycle (3.52s). Charge
currents above the maximum register value are reported
as 7FFFh. Discharge currents below the minimum regis-
ter value are reported as 8000h.
The Average Current register reports an average cur-
rent level over the preceding 28.16s. The register value
is updated every 28.16s in two’s complement form and
represents an average of the eight preceding Current
register values.
MSB—ADDRESS 0Ah LSB—ADDRESS 0Bh
S 29 28 27 26 25 24 2322 21 20 X X X X X
MSbLSbMSbLSb
“S”: SIGN BIT(S), “X”: RESERVEDUNITS: 0.125°C
Figure 5. Temperature Register Format
MSB—ADDRESS 0Eh LSB—ADDRESS 0Fh
S 214 213 212 211 210 29 2827 26 25 24 23 22 21 20
MSbLSbMSbLSb
“S”: SIGN BIT(S)UNITS: 1.5625μV/RSNS
Figure 6. Current Register Format
MSB—ADDRESS 08h LSB—ADDRESS 09h
S 214 213 212 211 210 29 2827 26 25 24 23 22 21 20
MSbLSbMSbLSb
“S”: SIGN BIT(S)UNITS: 1.5625μV/RSNS
Figure 7. Average Current Register Format
DS2775/DS2776/DS2777/DS2778
2-Cell, Stand-Alone, Li+ Fuel-Gauge IC with
Protector and Optional SHA-1 Authentication
Current Offset Correction

Every 1024th conversion, the ADC measures its input
offset to facilitate offset correction. Offset correction
occurs approximately once per hour. The resulting cor-
rection factor is applied to the subsequent 1023 mea-
surements. During the offset correction conversion, the
ADC does not measure the sense resistor signal. A
maximum error of 1/1024 in the Accumulated Current
register (ACR) is possible; however, to reduce the error,
the current measurement made just prior to the offset
conversion is retained in the Current register and is
substituted for the dropped current measurement in the
current accumulation process. Therefore the accumu-
lated current error due to offset correction is typically
much less than 1/1024.
Current Offset Bias

The current offset bias value (COB) allows a program-
mable offset value to be added to raw current measure-
ments. The result of the raw current measurement plus
COB is displayed as the current measurement result in
the Current register and is used for current accumula-
tion. COB can be used to correct for a static offset error
or can be used to intentionally skew the current results
and therefore the current accumulation. Read and write
access is allowed to COB. Whenever the COB is writ-
ten, the new value is applied to all subsequent current
measurements. COB can be programmed in 1.56µV
steps to any value between -199.7µV and +198.1µV.
The COBR value is stored as a two’s complement value
in volatile memory and must be initialized through the
interface on power-up. The factory default value is 00h.
Current Blanking

The current blanking feature modifies current measure-
ment result prior to being accumulated in the ACR.
Current blanking occurs conditionally when a current
measurement (raw current and COBR) falls in one of
two defined ranges. The first range prevents charge
currents less than 100µV from being accumulated. The
second range prevents discharge currents less than
25µV in magnitude from being accumulated. Charge
current blanking is always performed; however, dis-
charge current blanking must be enabled by setting the
NBEN bit in the Control register. See the Control
Register Formatdescription for additional information.
Current Measurement Gain

The DS2775–DS2778’s current measurement gain can
be adjusted through the RSGAIN register, which is facto-
ry calibrated to meet the data sheet specified accuracy.
RSGAIN is user accessible and can be reprogrammed
after module or pack manufacture to improve the current
measurement accuracy. Adjusting RSGAIN can correct
for variation in an external sense resistor’s nominal value
and allows the use of low-cost, nonprecision current-
sense resistors. RSGAIN is an 11-bit value stored in 2
bytes of the parameter EEPROM memory block. The
RSGAIN value adjusts the gain from 0 to 1.999 in steps
of 0.001 (precisely 2–10). The user must use caution
when programming RSGAIN to ensure accurate current
measurement. When shipped from the factory, the gain
calibration value is stored in two separate locations in the
parameter EEPROM block, RSGAIN, which is reprogram-
mable and FRSGAIN, which is read-only. RSGAIN deter-
mines the gain used in the current measurement. The
ADDRESS 7Bh
S 26 25 24 23 22 21 20
MSbLSb
“S”: SIGN BIT(S)UNITS: 1.56μV/RSNS
Figure 8. Current Offset Bias Register Format
MSB—ADDRESS 78h LSB—ADDRESS 79h
X SC0 OC1 OC0 X 20 2-1 2-22-3 2-4 2-5 2-6 2-7 2-8 2-9 2-10
MSbLSbMSbLSb
“X”: RESERVEDUNITS: 2–10
Figure 9. RSGAIN Register
DS2775/DS2776/DS2777/DS2778
2-Cell, Stand-Alone, Li+ Fuel-Gauge IC with
Protector and Optional SHA-1 Authentication

FRSGAIN value is provided to preserve the factory cali-
bration value only and is not used to calibrate the current
measurement. The 16-bit FRSGAIN value is readable
from addresses B0h and B1h.
Sense-Resistor Temperature
Compensation

The DS2775–DS2778 can temperature compensate the
current-sense resistor to correct for variation in a sense
resistor’s value over temperature. The DS2775–DS2778
are factory programmed with the sense-resistor temper-
ature coefficient, RSTC, set to zero, which turns off the
temperature compensation function. RSTC is user
accessible and can be reprogrammed after module or
pack manufacture to improve the current accuracy
when using a high-temperature coefficient current-
sense resistor. RSTC is an 8-bit value stored in the
parameter EEPROM memory block. The RSTC value
sets the temperature coefficient from 0 to +7782ppm/°C
in steps of 30.5ppm/°C. The user must program RSTC
cautiously to ensure accurate current measurement.
Temperature compensation adjustments are made when
the Temperature register crosses 0.5°C boundaries. The
temperature compensation is most effective with the
resistor placed as close as possible to the VSSterminal
to optimize thermal coupling of the resistor to the on-chip
temperature sensor. If the current shunt is constructed
with a copper PCB trace, run the trace under the
DS2775–DS2778 package whenever possible.
Current Accumulation

Current measurements are internally summed, or accu-
mulated, at the completion of each conversion period
with the results displayed in the Accumulated Current
register (ACR). The accuracy of the ACR is dependent
on both the current measurement and the conversion
time base. The ACR has a range of 0 to +409.6mVh
with an LSb of 6.25µVh. Additional registers hold frac-
tional results of each accumulation to avoid truncation
errors. The fractional result bits are not user accessible.
Accumulation of charge current above the maximum
register value is reported at the maximum value; con-
versely, accumulation of discharge current below the
minimum register value is reported at the minimum
value.
Charge currents (positive Current register values) less
than 100µV are not accumulated in order to mask the
effect of accumulating small positive offset errors over
long periods. This effect limits the minimum charge cur-
rent, for coulomb counting purposes, to 5mA for RSNS
= 0.020Ωand 20mA for RSNS= 0.005Ω(see Table 2 for
more details).
Read and write access is allowed to the ACR. The
ACR must be written most significant byte (MSB) first,
then LSB. Whenever the ACR is written, the fractional
accumulation result bits are cleared. The write must
be completed in 3.5s. A write to the ACR forces the
ADC to perform an offset correction conversion and
update the internal offset correction factor. The cur-
rent measurement and accumulation begin with the
second conversion following a write to the ACR. To
preserve the ACR value in case of power loss, the
ACR value is backed up to EEPROM. The ACR value
is recovered from EEPROM on power-up. See the
Memory Mapfor specific address location and back-
up frequency.
RSNSTYPE OF RESOLUTION/RANGEVSS - VSNS20m15m10m5m

Current Resolution 1.5625μV 78.13μA 104.2μA 156.3μA 312.5μA
Current Range ±51.2mV ±2.56A ±3.41A ±5.12A ±10.2A
ACR Resolution 6.25μVh 312.5μAh 416.7μAh 625μAh 1.250mAh
ACR Range ±409.6mVh ±20.48Ah ±27.30Ah ±40.96Ah ±81.92Ah
Table 2. Resolution and Range vs. Sense Resistor

MSB—ADDRESS 10h LSB—ADDRESS 11h 15 214 213 212 211 210 29 2827 26 25 24 23 22 21 20
MSbLSbMSbLSb
UNITS: 6.25μV/RSNS
Figure 10. Accumulated Current Register Format
DS2775/DS2776/DS2777/DS2778
2-Cell, Stand-Alone, Li+ Fuel-Gauge IC with
Protector and Optional SHA-1 Authentication
Accumulation Bias

In some designs a systematic error or an application
preference requires the application of an arbitrary bias
to the current accumulation process. The Current
Accumulation Bias register (CAB) allows a user-pro-
grammed constant positive or negative polarity bias to
be included in the current accumulation process. The
value in CAB can be used to estimate battery currents
that do not flow through the sense resistor, estimate
battery self-discharge, or estimate current levels below
the current measurement resolution. The user-pro-
grammed two’s complement value, with bit weighting
the same as the current register, is added to the ACR
once per current conversion cycle. CAB is loaded on
power-up from EEPROM memory.
Cycle Counter

The cycle counter is an absolute count of the cumula-
tive discharge cycles. This register is intended to act as
a “cell odometer.” The LSb is two cycles, which allows
a maximum count of 510 discharge cycles. The register
does not loop. Once the maximum value is reached,
the register is clamped. This register is read and write
accessible while the parameter EEPROM memory block
(block 1) is unlocked. The Cycle Count register
becomes read-only once the EEPROM block is locked.
Capacity Estimation Algorithm

Remaining capacity estimation uses real-time mea-
sured values and stored parameters describing the cell
characteristics and application operating limits. Figure
13 describes the algorithm inputs and outputs.
Modeling Cell Characteristics

To achieve reasonable accuracy in estimating remain-
ing capacity, the cell performance characteristics over
temperature, load current, and charge-termination point
must be considered. Since the behavior of Li+ cells is
nonlinear, these characteristics must be included in the
capacity estimation to achieve an acceptable level of
accuracy in the capacity estimation. The FuelPack
method used in the DS2775–DS2778 is described in
general in Application Note 131: Lithium-Ion Cell Fuel
Gauging with Maxim Battery Monitor ICs. To facilitate
efficient implementation in hardware, a modified version
of the method outlined in Application Note 131 is used
to store cell characteristics in the DS2775–DS2778. Full
and empty points are retrieved in a lookup process that
retraces a piecewise linear model consisting of three
model curves named full, active empty, and standby
empty. Each model curve is constructed with five line
segments, numbered 1 through 5. Above +40°C, the
segment 5 model curves extend infinitely with zero
slope, approximating the nearly flat change in capacity
of Li+ cells at temperatures above +40°C. Segment 4 of
each model curves originates at +40°C on its upper end
and extends downward in temperature to the junction
with segment 3. Segment 3 joins with segment 2, which
in turn joins with segment 1. Segment 1 of each model
curve extends from the junction with segment 2 to infi-
nitely colder temperatures. The three junctions or break-
points that join the segments (labeled TBP12, TBP23,
and TBP34 in Figure 14) are programmable in 1°C
increments from -128°C to +40°C. The slope or deriva-
tive for segments 1, 2, 3, and 4 are also programmable
over a range of 0 to 15,555ppm in steps of 61ppm.
ADDRESS 61h
S 26 25 24 23 22 21 20
MSbLSb
“S”: SIGN BIT(S)UNITS: 6.25μV/RSNS
Figure 11. Current Accumulation Bias Register Format
ADDRESS 1Eh
27 26 25 24 23 22 21 20
MSbLSb
UNITS: 2 cycles
Figure 12. Cycle Counter Register Format
DS2775/DS2776/DS2777/DS2778
2-Cell, Stand-Alone, Li+ Fuel-Gauge IC with
Protector and Optional SHA-1 Authentication

CAPACITY LOOKUP
AVAILABLE CAPACITY CALCULATION
ACR HOUSEKEEPING
AGE ESTIMATOR
LEARN FUNCTION
VOLTAGE(R)FULLFULL(T)(R)
ACTIVE EMPTYAE(T)(R)
STANDBY EMPTYSE(T)(R)
REMAINING ACTIVE-ABSOLUTE
CAPACITY (RAAC) mAh(R)
REMAINING STANDBY-ABSOLUTE
CAPACITY (RSAC) mAh(R)
REMAINING ACTIVE-RELATIVE
CAPACITY (RARC) %(R)
REMAINING STANDBY-RELATIVE
CAPACITY (RSRC) %(R)
TEMPERATURE(R)
CURRENT(R)
AVERAGE CURRENT(R)
ACCUMULATED
CURRENT (ACR) (RW)
AGE SCALAR (AS)
(1 BYTE EE)
AGING CAPACITY (AC)
(2 BYTES EE)
SENSE-RESISTOR PRIME (RSNSP)
(1 BYTE EE)
CHARGE VOLTAGE (VCHG)
(1 BYTE EE)
MINIMUM CHARGE CURRENT (IMIN)
(1 BYTE EE)
ACTIVE-EMPTY VOLTAGE (VAE)
(1 BYTE EE)
ACTIVE-EMPTY CURRENT (IAE)
(1 BYTE EE)
CELL MODEL PARAMETERS
(EEPROM)
USER MEMORY (EEPROM)
16 BYTES
CYCLE COUNTER (EEPROM)
Figure 13. Top-Level Algorithm Diagram
Full

The full curve defines how the full point of a given cell
depends on temperature for a given charge termina-
tion. The application’s charge termination method
should be used to determine the table values. The
DS2775–DS2778 reconstruct the full line from cell char-
acteristic table values to determine the full capacity of
the battery at each temperature. Reconstruction occurs
in one-degree temperature increments.
Active Empty

The active-empty curve defines the variation of the
active-empty point over temperature. The active-empty
point is defined as the minimum voltage required for
system operation at a discharge rate based on a high-
level load current (one that is sustained during a high-
power operating mode). This load current is
programmed as the active-empty current (IAE), and
should be a 3.5s average value to correspond to values
DS2775/DS2776/DS2777/DS2778
2-Cell, Stand-Alone, Li+ Fuel-Gauge IC with
Protector and Optional SHA-1 Authentication

100%
SEGMENT 1
DERIVATIVE
(ppm/°C)
FULL
ACTIVE
EMPTYSTANDBY
EMPTY
SEGMENT 2SEGMENT 3SEGMENT 4
+40°CTBP34TBP23TBP12
SEGMENT 5
CELL
CHARACTERIZATION
CELL
CHARACTERIZATION DATA
Figure 14. Cell Model Example Diagram
read from the Current register. The specified minimum
voltage, or active-empty voltage (VAE), should be a
110ms average value to correspond to the values read
from the voltage register. The VAE value represents the
average of the two cell’s voltages, VIN1and VIN2. The
DS2775–DS2778 reconstruct the active-empty line from
the cell characteristic table to determine the active-
empty capacity of the battery at each temperature.
Reconstruction occurs in one-degree temperature
increments.
Standby Empty

The standby-empty curve defines the variation of the
standby-empty point over temperature. The standby-
empty point is defined as the minimum voltage required
for standby operation at a discharge rate dictated by
the application standby current. In typical handheld
applications, standby empty represents the point that
the battery can no longer support DRAM refresh and
thus the standby voltage is set by the minimum DRAM
voltage-supply requirements. In other applications,
standby empty can represent the point that the battery
can no longer support a subset of the full application
operation, such as games or organizer functions. The
standby-load current and voltage are used for deter-
mining the cell characteristics but are not programmed
into the DS2775–DS2778. The DS2775–DS2778 recon-
struct the standby-empty line from the cell characteris-
tic table to determine the standby-empty capacity of
the battery at each temperature. Reconstruction occurs
in one-degree temperature increments.
Cell Model Construction

The model is constructed with all points normalized to
the fully charged state at +40°C. All values are stored in
the cell parameter EEPROM block. The +40°C full value
is stored in µVh with an LSb of 6.25µVh. The +40°C
active-empty value is stored as a percentage of +40°C
DS2775/DS2776/DS2777/DS2778
2-Cell, Stand-Alone, Li+ Fuel-Gauge IC with
Protector and Optional SHA-1 Authentication

full with a resolution of 2-10. Standby empty at +40°C is,
by definition, zero and therefore no storage is required.
The slopes (derivatives) of the four segments for each
model curve are stored in the cell parameter EEPROM
block as ppm/°C. The breakpoint temperatures of each
segment are stored there also (refer to Application Note
3584: Storing Battery Fuel Gauge Parameters in
DS2780 for more details on how values are stored). An
example of data stored in this manner is shown in
Table3.
Application Parameters

In addition to cell model characteristics, several appli-
cation parameters are needed to detect the full and
empty points, as well as calculate results in mAh units.
Sense Resistor Prime (RSNSP)

RSNSP stores the value of the sense resistor for use in
computing the absolute capacity results. The value is
stored as a 1-byte conductance value with units of
mhos (1/Ω). RSNSP supports resistor values of 1Ωto
3.922mΩ. RSNSP is located in the parameter EEPROM
block.
RSNSP = 1/RSNS(units of mhos; 1/Ω)
Charge Voltage (VCHG)

VCHG stores the charge voltage threshold used to
detect a fully charged state. The voltage is stored as a
1-byte value with units of 19.5mV and can range from 0
to 4.978V. VCHG should be set marginally less than the
average cell voltage at the end of the charge cycle to
ensure reliable charge termination detection. VCHG is
located in the parameter EEPROM block.
TEMPERATURE
CELL MODEL
PARAMETERS
(EEPROM)LOOKUP
FUNCTION
FULL(T)
AE(T)
SE(T)
Figure 15. Lookup Function Diagram
Manufacturer’s Rated Cell Capacity: 1000mAh
Charge Voltage: 4.2V Termination Current: 50mA
Active Empty (V): 3.0V Standby Empty (I): 300mA
Sense Resistor: 0.020
SEGMENT BREAKPOINTS

TBP12 = -12°C
TBP23 = 0°C
TBP34 = 18°C
CALCULATED VALUE+40°C NOMINAL
(mAh)
SEGMENT 1
(ppm/°C)
SEGMENT 2
(ppm/°C)
SEGMENT 3
(ppm/°C)
SEGMENT 4
(ppm/°C)

Full 1051 3601 3113 1163 854
Active Empty 2380 1099 671 305
Standby Empty 1404 427 244 183
Table 3. Example Cell Characterization Table (Normalized to +40°C)
DS2775/DS2776/DS2777/DS2778
2-Cell, Stand-Alone, Li+ Fuel-Gauge IC with
Protector and Optional SHA-1 Authentication
Minimum Charge Current (IMIN)

IMIN stores the charge-current threshold used to detect
a fully charged state. It is stored as a 1-byte value with
units of 50µV (IMIN x RSNS) and can range from 0 to
12.75mV. Assuming RSNS= 20mΩ, IMIN can be pro-
grammed from 0 to 637.5mA in 2.5mA steps. IMIN
should be set marginally greater than the charge cur-
rent at the end of the charge cycle to ensure reliable
charge termination detection. IMIN is located in the
parameter EEPROM block.
Active-Empty Voltage (VAE)

VAE stores the voltage threshold used to detect the
active-empty point. The value is stored in 1 byte with
units of 19.5mV and can range from 0 to 4.978V. VAE is
stored as an average of the cell’s voltages. VAE is locat-
ed in the parameter EEPROM block. See the Modeling
Cell Characteristics section for more information.
Active-Empty Current (IAE)

IAE stores the discharge-current threshold used to
detect the active-empty point. The unsigned value rep-
resents the magnitude of the discharge current and is
stored in 1 byte with units of 200µV and can range from
0 to 51.2mV. Assuming RSNS= 20mΩ, IAE can be pro-
grammed from 0 to 2550mA in 10mA steps. IAE is locat-
ed in the parameter EEPROM block. See the Modeling
Cell Characteristicssection for more information.
Aging Capacity (AC)

AC stores the rated cell capacity, which is used to esti-
mate the decrease in battery capacity that occurs dur-
ing normal use. The value is stored in 2 bytes in the
same units as the ACR (6.25µVh). When set to the man-
ufacturer’s rated cell capacity, the aging estimation rate
is approximately 2.4% per 100 cycles of equivalent full
capacity discharges. Partial discharge cycles are
added to form equivalent full capacity discharges. The
default aging estimation results in 88% capacity after
500 equivalent cycles. The aging estimation rate can
be adjusted by setting the AC to a value other than the
cell manufacturer’s rating. Setting AC to a lower value
accelerates the aging estimation rate. Setting AC to a
higher value retards the aging estimation rate. The AC
is located in the parameter EEPROM block.
Age Scalar (AS)

AS adjusts the cell capacity estimation results down-
ward to compensate for aging. The AS is a 1-byte value
that has a range of 49.2% to 100%. The LSb is weight-
ed at 0.78% (precisely 2-7). A value of 100% (128 deci-
mal or 80h) represents an unaged battery. A value of
95% is recommended as the starting AS value at the
time of pack manufacture to allow the learning of a larg-
er capacity on batteries that have an initial capacity
greater than the rated cell capacity programmed in the
cell characteristic table. The AS is modified by aging
estimation introduced under aging capacity and by the
learn function.
Batteries are typically considered worn out when the full
capacity reaches 80% of the rated capacity; therefore,
the AS value is not required to range to 0%. It is
clamped to 50% (64 decimal or 40h). If a value of 50%
is read from the AS, the host should prompt the user to
initiate a learning cycle.
The host system has read and write access to the AS;
however, caution should be exercised when writing it to
ensure that the cumulative aging estimate is not over-
written with an incorrect value. The AS is automatically
saved to EEPROM. The EEPROM value is recalled on
power-up.
Capacity Estimation Operation
Cycle-Count-Based Aging Estimation

As previously discussed, the AS register value is
adjusted occasionally based on cumulative discharge.
As the ACR register decrements during each discharge
cycle, an internal counter is incremented until equal to
32 times the AC. The AS is then decremented by one,
resulting in a decrease of the scaled full battery capaci-
ty by 0.78% (approximately 2.4% per 100 cycles). The
internal counter is reset in the event of a learn cycle.
See the Aging Capacity (AC)section for recommenda-
tions on customizing the age estimation rate.
Learn Function

Because Li+ cells exhibit charge efficiencies near unity,
the charge delivered to a Li+ cell from a known empty
point to a known full point is a dependable measure of
the cell’s capacity. A continuous charge from empty to
full results in a learn cycle. First, the active-empty point
must be detected. The learn flag (LEARNF) is set at this
point. Then, once charging starts, the charge must con-
tinue uninterrupted until the battery is charged to full.
Upon detecting full, the LEARNF is cleared, the charge-
to-full (CHGTF) flag is set, and the AS is adjusted
according to the learned capacity of the cell.
Full capacity estimation based on the learn function is
more accurate than the cycle-count-based estimation
introduced under aging capacity. The learn function
reflects the current performance of the cell. Cycle-
count-based estimation is an approximation derived
from the manufacturer’s recommendation for a typical
cell. Therefore, the internal counter used for cycle-
DS2775/DS2776/DS2777/DS2778
2-Cell, Stand-Alone, Li+ Fuel-Gauge IC with
Protector and Optional SHA-1 Authentication

count-based estimation is reset after a learn cycle. The
cycle-count-based estimation is used only in the
absence of a learn cycle.
ACR Housekeeping

The ACR value is adjusted occasionally to maintain the
coulomb count within the model curve boundaries. When
the battery is charged to full (CHGTF set), the ACR is set
equal to the age-scaled full lookup value at the present
temperature. If a learn cycle is in progress, correction of
the ACR value occurs after the AS is updated. When an
empty condition is detected (LEARNF and/or AEF set),
the ACR adjustment is conditional:If the AEF is set and the LEARNF is not set, the
active-empty point was not detected. The battery is
likely below the active-empty capacity of the model.
The ACR is set to the active-empty model value at
present temperature only if it is greater than the
active-empty model value at present temperature.If the AEF is set, the LEARNF is not set, and the ACR
is below the active-empty model value at present
temperature, the ACR is not updated.If the LEARNF is set, the battery is at the active-
empty point and the ACR is set to the active-empty
model value.
Full Detect

Full detection occurs when the average of VIN1and
VIN2voltage registers remain continuously above the
charge voltage (VCHG) threshold for the duration of two
average current (IAVG) readings, and both IAVG read-
ings are below terminating current (IMIN). The two con-
secutive IAVG readings must also be positive and
nonzero (>16 LSB). This ensures that removing the bat-
tery from the charger does not result in a false detec-
tion of full. Full detect sets the charge to full (CHGTF)
bit in the Status register.
Active-Empty Point Detect

Active-empty point detection occurs when the average
of VIN1and VIN2voltage registers drops below the VAE
threshold and the two previous current readings are
above IAE. This captures the event of the battery reach-
ing the active-empty point. Note that the two previous
current readings must be negative and greater in mag-
nitude than IAE (i.e., a larger discharge current than
specified by the IAE threshold). Qualifying the voltage
level with the discharge rate ensures that the active-
empty point is not detected at loads much lighter than
those used to construct the model. Also, the active-
empty point must not be detected when a deep dis-
charge at a very light load is followed by a load greater
than IAE. Either case would cause a learn cycle on the
following charge to include part of the standby capacity
in the measurement of the active capacity. Active-
empty point detection sets the learn flag (LEARNF) bit
in the Status register.
Note:
Do not confuse the active-empty point with the
active-empty flag. The active-empty flag is set only
when the VAE threshold is passed.
Result Registers

The DS2775–DS2778 process measurement and cell
characteristics on a 3.5s interval and yield seven result
registers. The result registers are sufficient for direct
display to the user in most applications. The host sys-
tem can produce customized values for system use or
user display by combining measurement, result, and
user EEPROM values.
FULL(T)

The full capacity of the battery at the present tempera-
ture is reported normalized to the +40°C full value. This
15-bit value reflects the cell model full value at the
given temperature. The FULL(T) register reports values
between 100% and 50% with a resolution of 61ppm
(precisely 2-14). Though the register format permits val-
ues greater than 100%, the register value is clamped to
a maximum value of 100%.
Active Empty, AE(T)

The active-empty capacity of the battery at the present
temperature is reported normalized to the +40°C full
value. This 13-bit value reflects the cell model active-
empty value at the given temperature. The AE(T) regis-
ter reports values between 0% and 49.8% with a
resolution of 61ppm (precisely 2-14).
Standby Empty, SE(T)

The standby-empty capacity of the battery at the pre-
sent temperature is reported normalized to the +40°C
full value. This 13-bit value reflects the cell model
standby-empty value at the current temperature. The
SE(T) register reports values between 0% and 49.8%
with a resolution of 61ppm (precisely 2-14).
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