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DS2436DSN/a18avaiBattery ID/Monitor Chip


DS2436 ,Battery ID/Monitor ChipPIN DESCRIPTIONGND - GroundDQ - Data In/OutV - Supply/Battery ConnectionDDDESCRIPTIONThe DS2436 Bat ..
DS2436Z ,Battery ID/Monitor Chipblock diagram of Figure 1 shows the major components of the DS2436. The DS2436 has sevenmajor data ..
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DS2436
Battery ID/Monitor Chip
FEATURESUnique 1-Wire™ interface requires only one
port pin for communicationProvides unique 64-bit identification number
to battery packsOn-board A/D converter monitors battery
voltage for end-of-charge and end-of-
discharge determinationEliminates thermistors by sensing battery
temperature on-chip256-bit nonvolatile user memory available
for storage of data such as fuel gauge and
manufacturing information2-byte cycle counterOperating range of -40°C to +85°CApplications include portable computers,
portable/ cellular phones, consumerelectronics, and handheld instrumentation
PACKAGE OUTLINE

DS2436Z150-mil, 8-Pin SOIC
PIN DESCRIPTION

GND - Ground
DQ - Data In/OutVDD - Supply/Battery Connection
DESCRIPTION

The DS2436 Battery Identification/Monitor Chip provides a convenient method of tagging andidentifying battery packs by manufacturer, chemistry, or other identifying parameters. The DS2436
allows the battery pack to be coded with a unique 64-Bit ROM ID and a 16-Bit Manufacturer ID, and also
store information regarding the battery life and charge/ discharge characteristics in its nonvolatile
memory.
The DS2436 also performs the essential function of monitoring battery temperature, without the need for
a thermistor in the battery pack.
A cycle counter assists to determine the remaining cycle life of the battery.
Finally, the DS2436 measures battery voltage and sends that measured value to a host CPU for use inend-of-charge or end-of-discharge determination or basic fuel gauge operation.
Information is sent to/from the DS2436 over a 1-Wire interface, so that battery packs need only have
DS2436
Battery ID/Monitor Chip

GND
DS2436B
TO-92 PACKAGE
VDD
NC
GND
DS2436
DETAILED PIN DESCRIPTION
OVERVIEW

The block diagram of Figure 1 shows the major components of the DS2436. The DS2436 has seven
major data components: 1) 64-bit lasered ROM ID, 2) Scratchpad Memory, 3) Nonvolatile Memory, 4)
On-board SRAM, 5) Temperature sensor, 6) Battery voltage A/D converter, and 7) 16-bit Manufacturer
ID Register.
Communication to the DS2436 is via a 1-Wire port. With the 1-Wire port, the memory and control
functions will not be available until the ROM function protocol has been established. The master must
first provide one of four ROM function commands: 1) Read ROM, 2) Match ROM, 3) Search ROM, or 4)
Skip ROM. These commands operate on the 64-bit ROM ID portion of each device and can identify aspecific device if many are present on the 1-Wire line as well as indicate to the bus master how many and
what types of devices are present. After a ROM function sequence has been successfully executed, the
memory and control functions are accessible. The master may then provide any one of the fifteen memory
and control function commands.
Access to the DS2436 memory is through the 1-Wire interface and scratchpad memory. Charging
parameters and other data such as battery chemistry, fuel gauge information, and other user data may be
stored in the DS2436, allowing this information to be permanently stored in the battery pack.
PARASITE POWER

The ID ROM registers and memory of the DS2436 can be read even when the battery is completelydischarged by using parasite-powered operation. When parasite powered, the DS2436 “steals” power
from the DQ line whenever it is high. DQ will provide sufficient power for read operations as long as
specified timing and voltage requirements are met (see the section titled “1-Wire Bus System”).
DS2436
DS2436 BLOCK DIAGRAM Figure 1
DS2436
DS2436
DS2436 MEMORY MAP Figure 3

BYTEADDRESS
PAGE 1000h101h202h303h
SP1404h505h
NV1606h707h808h909h100Ah110Bh120Ch130Dh140Eh150Fh1610h1711h1812h1913h2014h2115h2216h2317h18h1Fh
DS2436
DS2436 MEMORY MAP (cont’d) Figure 3

BYTEADDRESS
PAGE 2020h121h222h323h
SP2424h525h
NV2626h727h28h3Fh
DS2436
DS2436 MEMORY MAP (cont’d) Figure 3

BYTEADDRESS
PAGE 3040h141h242h343h
SP3444h545h
SRAM646h747h5Fh
DS2436
DS2436 MEMORY MAP (cont’d) Figure 3

BYTEADDRESS
PAGE 4060h161h262h
REGISTERS363h64h565h66h67h68h69h106Ah6Bh6Ch6Dh6Eh156Fh70h71h72h73h2074h75h76h2377h2478h7Fh
DS2436
DS2436 MEMORY MAP (cont’d) Figure 3

BYTEADDRESS
PAGE 5080h181h282h
REGISTERS383h9Fh
DS2436
MEMORY

The DS2436’s memory is divided into five pages, each page filling 32 bytes of address space. Not all ofthe available addresses are used, however. Refer to the memory map of Figure 3 to see actual addresses
which are available.
The first three pages of memory consist of a scratchpad RAM and either EEPROM (pages 1 and 2) or
SRAM (page 3). The scratchpads help insure data integrity when communicating over the 1-Wire bus.Data is first written to the scratchpad where it can be read back. After the data has been verified, a copy
scratchpad command will transfer the data to the EEPROM or SRAM. This process insures data integrity
when modifying the memory.
The fourth page of memory consists of registers which contain the Temperature, Voltage, and Statusregisters. These registers are made from SRAM cells, except for the lock bit in the status register which is
implemented in EEPROM.
The fifth page of memory holds the Manufacturer ID, implemented in laser ROM, and the Cycle Counter,
implemented in EEPROM.
PAGE 1

The first page of memory has 24 bytes. It consists of scratchpad RAM and nonvolatile EEPROM
memory. These 24 bytes may be used to store any data, such as: battery chemistry descriptors,manufacturing lot codes, etc.
This page may be locked to prevent data stored here from being changed inadvertently.
The nonvolatile and the scratchpad portions of this page are organized identically, as shown in Figure 3.
In this page, these two portions are referred to as NV1 and SP1, respectively.
PAGE 2

The second page of memory has 8 bytes. It consists of a scratchpad RAM and a nonvolatile EEPROM
memory. These 8 bytes may be used to store additional data. In contrast to Page 1 memory, the Lock
function is not available for Page 2.
PAGE 3

The third page of memory has 8 bytes. It consists of a scratchpad RAM and an SRAM memory. This
address space may be used to store additional data, provided that, should the battery discharge completely
and power to the DS2436 is lost, this data may also be lost without serious repercussions. Data which
must remain even if power to the DS2436 is lost should be placed in either Page 1 or Page 2.
Prefer this section of memory to store fuel gauge and self discharge information. If the battery dies and
this information is lost, no serious consequences will result since the user can easily determine that the
battery is dead.
PAGE 4

The fourth page of memory is used by the DS2436 to store the battery temperature and voltage. A 2-byteStatus Register informs of conversion progress and memory lock state.
DS2436
TEMPERATURE REGISTERS (60h-61h)

The DS2436 can measure temperature without external components. The resulting temperaturemeasurement is placed in a two-byte Temperature Register. This register is implemented in SRAM, and
therefore will hold data until the battery voltage falls below minimum VDD.
The temperature reading is provided in a 13-bit, two’s complement format, with 0.03125°C resolution.Table 1 describes the exact relationship of output data to measured temperature. The data is transmitted
serially over the 1-Wire interface. The DS2436 can measure temperature over the range of -40°C to
+85°C in 0.03125°C increments. For Fahrenheit usage, a lookup table or conversion factor must be used.
Note that temperature is represented in the DS2436 in terms of a 0.03125°C LSB, yielding the following
13-bit format:
MSB LSB
Unit =1°C
The MSB of the Temperature Register contains the integer portion of the temperature valve.
TEMPERATURE/DATA RELATIONSHIPS Table 1
DS2436
STATUS REGISTER (62h-63h)

The Status Register is a two-byte read only register at addresses 62h and 63h. Address 62h is the leastsignificant byte of the Status Register and is currently the only address with defined status bits; the other
byte at address 63h is reserved for future use. The Status Register is formatted as follows:
MSB LSB62h63h
where
TB = Temperature Busy flag. “1” = temperature conversion in progress; “0” = temperature
conversion complete, valid data in temperature register.
NVB = Nonvolatile memory busy flag. “1” = Copy from scratchpad to EEPROM in progress, “0”= nonvolatile memory is not busy. A copy to EEPROM may take from 2 ms to 10 ms
(taking longer at lower supply voltages).
LOCK = “1” indicates that NV1 is locked; “0” indicates that NV1 is unlocked. This status bit is
implemented in EEPROM in order to preserve its state even when the battery is
completely discharged.
ADB = A/D converter busy flag. “1” = analog-to-digital conversion in progress on battery voltage;
“0” = conversion complete, no measurement being made. An A/D conversion takesapproximately 10 ms.
VOLTAGE REGISTER (77h-78h)

The onboard analog-to-digital converter (ADC) has 10 bits of resolution and will perform a conversion
when the DS2436 receives the command protocol (Convert V) [B4h]. The result of this measurement is
placed in the 2-byte Voltage Register (see Memory Map). The range for the DS2436 ADC is 0V to 10V;this range is suitable for NiCd or NiMH battery packs up to six cells, and for lithium ion battery packs of
two cells. The full-scale range of the ADC is scaled to 10.24V, resulting in a resolution of 10 mV.
While the ADC has a range that extends to 0V, it is important to note that the battery voltage is also the
supply voltage to the DS2436. As such, the accuracy of the ADC begins to degrade below batteryvoltages of 2.4 volts, and the ability to make conversions is limited by the operating voltage range of the
DS2436.
Voltage is expressed in this register in straight binary format, as outlined in Table 2. Note that while
codes exits for values below 2.4 volts, accuracy of the ADC and the limitation on the DS2436’s supplyvoltage make it unlikely that these values would be used in actual practice.
DS2436
VOLTAGE/DATA RELATIONSHIP Table 2
PAGE 5

The fifth page of memory holds the Manufacturer ID number, as well as a 2-byte counter for counting the
number of battery charge/discharge cycles.
MANUFACTURER ID REGISTER (80h and 81h)

The Manufacturer ID Register is a 16-bit laser ROM register that can contain a unique identification codeif purchased from Dallas Semiconductor. This ID number is programmed by Dallas Semiconductor, is
unchangeable, and is unique to each customer. This ID number may be used to assure that batteries
containing a DS2436 have the same manufacturer ID number as a charger configured to operate with that
battery pack. This feature may be used to prevent charging of batteries for which the charging circuit has
not been designed.
CYCLE COUNTER (82h and 83h)

The Cycle Counter gives an indication of the number of charge/discharge cycles the battery pack has
been through. This nonvolatile register is incremented by the user through the use of a protocol to theDS2436 and is reset by another protocol. The counter is a straight binary counter, formatted as follows:
CYCLE COUNTER
MSB82h83h
The Cycle Counter does not roll over when it reaches its maximum value (FFFFh).
MEMORY FUNCTION COMMANDS 64-BIT LASERED ROM
Each DS2436 contains a unique ROM code that is 64 bits long. The first 8 bits are a 1-Wire family code
(DS2436 code is 1Bh). The next 48 bits are a unique serial number. The last 8 bits are a Cyclic
Redundancy Check (CRC) of the first 56 bits. (See Figure 4.) The 64-bit ROM and ROM Function
Control section allow the DS2436 to operate as a 1-Wire device and follow the 1-Wire protocol detailed
in the section “1-Wire Bus System.”
The functions required to control sections of the DS2436 are not accessible until the ROM function
protocol has been satisfied. This protocol is described in the ROM Function Protocol Flow Chart (Figure
5). The 1-Wire bus master must first provide one of four ROM function commands: 1) Read ROM, 2)
Match ROM, 3) Search ROM, or 4) Skip ROM. After a ROM function sequence has been successfully
DS2436
CRC GENERATION

The DS2436 has an 8-bit CRC stored in the most significant byte of the 64-bit ROM. The bus master cancompute a CRC value from the first 56 bits of the 64-bit ROM and compare it to the value stored within
the DS2436 to determine if the ROM data has been received error-free by the bus master. Additionally,
each page read appends one CRC byte. The equivalent polynomial function of this CRC is:
CRC = X8 + X5 + X4 + 1n = bit at the n-th stage
+ = "exclusive-or" function
The DS2436 also generates an 8-bit CRC value using the same polynomial function shown above and
provides this value to the bus master to validate the transfer of data bytes. In each case where a CRC is
used for data transfer validation, the bus master must calculate a CRC value using the polynomial
function given above and compare the calculated value to either the 8-bit CRC value stored in the 64-bitROM portion of the DS2436 (for ROM reads) or the 8-bit CRC value computed within the DS2436
scratchpad (which is read as a 33rd byte when the scratchpad is read). The comparison of CRC values and
decision to continue with an operation are determined entirely by the bus master. There is no circuitry
inside the DS2436 that prevents a command sequence from proceeding if the CRC stored in or calculated
by the DS2436 does not match the value generated by the bus master. Proper use of the CRC can result ina communication channel with a very high level of integrity.
The 1-Wire CRC can be generated using a polynomial generator consisting of a shift register and XOR
gates as shown in Figure 6. Additional information about the Dallas 1-Wire CRC is available in an
application note entitled “Understanding and Using Cyclic Redundancy Checks with DallasSemiconductor Touch Memory Products” (App Note #27).
In the circuit in Figure 6, the shift register bits are initialized to 0. Then, starting with the least significant
bit of the family code, 1 bit at a time is shifted in. After the 8th bit of the family code has been entered,
the serial number is entered. After the 48th bit of the serial number has been entered, the shift registercontains the CRC value. Shifting in the 8 bits of CRC should return the shift register to all 0s.
64-BIT LASERED ROM Figure 4

MSB LSB MSB LSB MSB LSB
DS2436
ROM FUNCTIONS FLOW CHART Figure 5
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