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DS1621+-DS1621S-DS1621S/T&R-DS1621S+-DS1621V
Digital Thermometer and Thermostat
FEATURESTemperature measurements require no
external componentsMeasures temperatures from -55°C to +125°C
in 0.5°C increments. Fahrenheit equivalent is
-67°F to 257°F in 0.9°F incrementsTemperature is read as a 9-bit value (2-byte
transfer)Wide power supply range (2.7V to 5.5V)Converts temperature to digital word in 1
secondThermostatic settings are user definable and
nonvolatileData is read from/written via a 2-wire serial
interface (open drain I/O lines)Applications include thermostatic controls,
industrial systems, consumer products,
thermometers, or any thermal sensitivesystem8-pin DIP or SO package (150mil and
208mil)
PIN ASSIGNMENT
PIN DESCRIPTION

SDA- 2-Wire Serial Data Input/OutputSCL- 2-Wire Serial Clock
GND- Ground
TOUT- Thermostat Output Signal- Chip Address Input- Chip Address InputA2- Chip Address Input
VDD- Power Supply Voltage
DESCRIPTION

The DS1621 Digital Thermometer and Thermostat provides 9-bit temperature readings, which indicate
the temperature of the device. The thermal alarm output, TOUT, is active when the temperature of thedevice exceeds a user-defined temperature TH. The output remains active until the temperature drops
below user defined temperature TL, allowing for any hysteresis necessary.
User-defined temperature settings are stored in nonvolatile memory so parts may be programmed prior to
insertion in a system. Temperature settings and temperature readings are all communicated to/from theDS1621 over a simple 2-wire serial interface.
DS1621
Digital Thermometer and Thermostat

TOUT
GND
VDD
DS1621S 8-PIN SO (150mil)
DS1621V 8-PIN SO (208mil)
See Mech Drawings Section
SCL
TOUT
GND
VDD
DS1621 8-PIN DIP (300mil)
See Mech Drawings Section
SCL
DS1621
Table 1. DETAILED PIN DESCRIPTION
OPERATION
Measuring Temperature

A block diagram of the DS1621 is shown in Figure 1. The DS1621 measures temperatures through the
use of an onboard proprietary temperature measurement technique. A block diagram of the temperaturemeasurement circuitry is shown in Figure 2.
The DS1621 measures temperature by counting the number of clock cycles that an oscillator with a low
temperature coefficient goes through during a gate period determined by a high temperature coefficient
oscillator. The counter is preset with a base count that corresponds to -55�C. If the counter reaches 0
before the gate period is over the temperature register, which is also preset to the -55�C value, is
incremented indicating that the temperature is higher than -55�C.
At the same time, the counter is preset with a value determined by the slope accumulator circuitry. This
circuitry is needed to compensate for the parabolic behavior of the oscillators over temperature. The
counter is then clocked again until it reaches 0. If the gate period is still not finished, then this process
repeats.
The slope accumulator is used to compensate for the nonlinear behavior of the oscillators over
temperature, yielding a high resolution temperature measurement. This is done by changing the number
of counts necessary for the counter to go through for each incremental degree in temperature. To obtain
the desired resolution, both the value of the counter and the number of counts per �C (the value of the
slope accumulator) at a given temperature must be known.
This calculation is done inside the DS1621 to provide 0.5�C resolution. The temperature reading is
provided in a 9-bit, two’s complement reading by issuing the READ TEMPERATURE command. Table
2 describes the exact relationship of output data to measured temperature. The data is transmitted through
the 2-wire serial interface, MSB first. The DS1621 can measure temperature over the range of -55�C to
+125�C in 0.5�C increments. For Fahrenheit usage a lookup table or conversion factor must be used.
DS1621
Figure 1. DS1621 FUNCTIONAL BLOCK DIAGRAM

SCL
TOUT
DS1621
Figure 2. TEMPERATURE MEASURING CIRCUITRY
Table 2. TEMPERATURE/DATA RELATIONSHIPS

Since data is transmitted over the 2-wire bus MSB first, temperature data may be written to/read from the
DS1621 as either a single byte (with temperature resolution of 1�C) or as two bytes. The second byte
would contain the value of the least significant (0.5�C) bit of the temperature reading as shown in Table1. Note that the remaining 7 bits of this byte are set to all "0"s.
Temperature is represented in the DS1621 in terms of a ½�C LSB, yielding the following 9-bit format:
MSBLSB
DS1621
Higher resolutions may be obtained by reading the temperature and truncating the 0.5�C bit (the LSB)
from the read value. This value is TEMP_READ. The value left in the counter may then be read by
issuing a READ COUNTER command. This value is the count remaining (COUNT_REMAIN) after the
gate period has ceased. By loading the value of the slope accumulator into the count register (using theREAD SLOPE command), this value may then be read, yielding the number of counts per degree C
(COUNT_PER_C) at that temperature. The actual temperature may be then be calculated by the user
using the following:
TEMPERATURE=TEMP_READ-0.25 + CPERCOUNT_
Thermostat Control
In its operating mode, the DS1621 functions as a thermostat with programmable hysteresis as shown in
Figure 3. The thermostat output updates as soon as a temperature conversion is complete.
When the DS1621’s temperature meets or exceeds the value stored in the high temperature trip register(TH), the output becomes active and will stay active until the temperature falls below the temperature
stored in the low temperature trigger register (TL). In this way, any amount of hysteresis may be
obtained.
The active state for the output is programmable by the user so that an active state may either be a logic"1" (VDD) or a logic "0" (0V).
Figure 3. THERMOSTAT OUTPUT OPERATION

DQ (Thermostat output, Active = High)
OPERATION AND CONTROL

The DS1621 must have temperature settings resident in the TH and TL registers for thermostaticoperation. A configuration/status register also determines the method of operation that the DS1621 will
use in a particular application, as well as indicating the status of the temperature conversion operation.
The configuration register is defined as follows:
where
DONE=Conversion Done bit. “1” = Conversion complete, “0” = Conversion in progress.TH
DS1621
THF=Temperature High Flag. This bit will be set to “1” when the temperature is greater than or
equal to the value of TH. It will remain “1” until reset by writing “0” into this location or removing power
from the device. This feature provides a method of determining if the DS1621 has ever been subjected to
temperatures above TH while power has been applied.
TLF=Temperature Low Flag. This bit will be set to “1” when the temperature is less than or equal
to the value of TL. It will remain “1” until reset by writing “0” into this location or removing power from
the device. This feature provides a method of determining if the DS1621 has ever been subjected to
temperatures below TL while power has been applied.
NVB=Nonvolatile Memory Busy flag. “1” = Write to an E2 memory cell in progress, “0” =
nonvolatile memory is not busy. A copy to E2 may take up to 10 ms.
POL=Output Polarity Bit. “1” = active high, “0” = active low. This bit is nonvolatile.
1SHOT=One Shot Mode. If 1SHOT is “1”, the DS1621 will perform one temperature conversion upon
receipt of the Start Convert T protocol. If 1SHOT is “0”, the DS1621 will continuously perform
temperature conversions. This bit is nonvolatile.
For typical thermostat operation the DS1621 will operate in continuous mode. However, for applications
where only one reading is needed at certain times or to conserve power, the one-shot mode may be used.
Note that the thermostat output (TOUT) will remain in the state it was in after the last valid temperature
conversion cycle when operating in one-shot mode.
2-WIRE SERIAL DATA BUS

The DS1621 supports a bidirectional 2-wire bus and data transmission protocol. A device that sends dataonto the bus is defined as a transmitter, and a device receiving data as a receiver. The device that controls
the message is called a “master." The devices that are controlled by the master are “slaves." The bus must
be controlled by a master device which generates the serial clock (SCL), controls the bus access, and
generates the START and STOP conditions. The DS1621 operates as a slave on the 2-wire bus.
Connections to the bus are made via the open-drain I/O lines SDA and SCL.
The following bus protocol has been defined (See Figure 4):Data transfer may be initiated only when the bus is not busy.During data transfer, the data line must remain stable whenever the clock line is HIGH. Changes in
the data line while the clock line is high will be interpreted as control signals.
Accordingly, the following bus conditions have been defined:
Bus not busy: Both data and clock lines remain HIGH.
Start data transfer: A change in the state of the data line, from HIGH to LOW, while the clock is HIGH,
defines a START condition.
Stop data transfer: A change in the state of the data line, from LOW to HIGH, while the clock line is

HIGH, defines the STOP condition.
DS1621
Data valid: The state of the data line represents valid data when, after a START condition, the data line

is stable for the duration of the HIGH period of the clock signal. The data on the line must be changed
during the LOW period of the clock signal. There is one clock pulse per bit of data.
Each data transfer is initiated with a START condition and terminated with a STOP condition. The
number of data bytes transferred between START and STOP conditions is not limited and is determined
by the master device. The information is transferred byte-wise and each receiver acknowledges with a
ninth-bit.
Within the bus specifications a regular mode (100kHz clock rate) and a fast mode (400kHz clock rate) are
defined. The DS1621 works in both modes.
Acknowledge: Each receiving device, when addressed, is obliged to generate an acknowledge after the

reception of each byte. The master device must generate an extra clock pulse which is associated with thisacknowledge bit.
A device that acknowledges must pull down the SDA line during the acknowledge clock pulse in such a
way that the SDA line is stable LOW during the HIGH period of the acknowledge related clock pulse. Of
course, setup and hold times must be taken into account. A master must signal an end of data to the slaveby not generating an acknowledge bit on the last byte that has been clocked out of the slave. In this case,
the slave must leave the data line HIGH to enable the master to generate the STOP condition.
Figure 4. DATA TRANSFER ON 2-WIRE SERIAL BUS

Figure 4 details how data transfer is accomplished on the 2-wire bus. Depending upon the state of the
R/W bit, two types of data transfer are possible:
1. Data transfer from a master transmitter to a slave receiver. The first byte transmitted by themaster is the slave address. Next follows a number of data bytes. The slave returns an acknowledge
bit after each received byte.
2. Data transfer from a slave transmitter to a master receiver. The first byte, the slave address,is transmitted by the master. The slave then returns an acknowledge bit. Next follows a number of
data bytes transmitted by the slave to the master. The master returns an acknowledge bit after all
DS1621
The master device generates all of the serial clock pulses and the START and STOP conditions. A
transfer is ended with a STOP condition or with a repeated START condition. Since a repeated START
condition is also the beginning of the next serial transfer, the bus will not be released.
The DS1621 may operate in the following two modes:
1. Slave receiver mode: Serial data and clock are received through SDA and SCL. After each byte is
received an acknowledge bit is transmitted. START and STOP conditions are recognized as the
beginning and end of a serial transfer. Address recognition is performed by hardware after receptionof the slave address and direction bit.
2. Slave transmitter mode: The first byte is received and handled as in the slave receiver mode.
However, in this mode the direction bit will indicate that the transfer direction is reversed. Serial data
is transmitted on SDA by the DS1621 while the serial clock is input on SCL. START and STOPconditions are recognized as the beginning and end of a serial transfer.
SLAVE ADDRESS

A control byte is the first byte received following the START condition from the master device. The
control byte consists of a 4-bit control code; for the DS1621, this is set as 1001 binary for read and write
operations. The next 3 bits of the control byte are the device select bits (A2, A1, A0). They are used bythe master device to select which of eight devices are to be accessed. These bits are in effect the 3 least
significant bits of the slave address. The last bit of the control byte (R/W) defines the operation to be
performed. When set to a “1” a read operation is selected, when set to a “0” a write operation is selected.
Following the START condition the DS1621 monitors the SDA bus checking the device type identifier
being transmitted. Upon receiving the 1001 code and appropriate device select bits, the slave device
outputs an acknowledge signal on the SDA line.
DS1621
Figure 5. 2-WIRE SERIAL COMMUNICATION WITH DS1621
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