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DS1318E+ |DS1318EDALLASN/a1000avaiParallel-Interface Elapsed Time Counter


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DS1318E+
Parallel-Interface Elapsed Time Counter
General Description
The DS1318 parallel-interface elapsed time counter
(ETC) is a 44-bit counter that maintains the amount of
time that the device operates from main and/or backup
power or during an external event. The internal
frequency of the counter clock is 4.096kHz, which pro-
vides a 244µs resolution and a maximum count of over
136 years. A built-in power-sense circuit detects power
failures, automatically switches to the backup supply,
and controls the timer. If an external event timer is
desired, the control input EXT can control the counter
operation. An open-drain output provides an interrupt,
and a square-wave output provides a programmable
square wave. The DS1318 is accessed through a byte-
wide parallel interface, and operates over the industrial
temperature range.
Applications

Power Meters
Industrial Controls
Servers
Features
Byte-Wide Parallel Interface44-Bit Binary Counter Provides Timer with 244µs
Resolution
Automatic Power-Fail Detect and Switch Circuitry
Selects Power Source from the Primary Power
and the Battery, and Write Protects the Internal
Registers
Internal Power-Fail Circuit Allows Timer to
Provide Primary or Battery Operation Times
Timer can Alternately Provide an Event Timer of
Either an Active-High or Active-Low Pulse
Interrupt Output Generated Periodically or When
the Upper 32 Bits of the Counter Match an Alarm
Register
Square-Wave Output with 16 Selectable
Frequencies from 32.768kHz to 0.5Hz
+3.3V OperationIndustrial Temperature Range: -40°C to +85°C
DS1318
Parallel-Interface Elapsed Time Counter
Pin Configuration
Ordering Information
Typical Operating Circuit

Rev 0; 2/04
DS1318
Parallel-Interface Elapsed Time Counter
ABSOLUTE MAXIMUM RATINGS
RECOMMENDED DC OPERATING CONDITIONS

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Voltage Range on any Pin Relative to Ground......-0.3V to +6.0V
Operating Temperature Range...........................-40°C to +85°C
Storage Temperature Range.............................-55°C to +125°C
Soldering Temperature ......................................See IPC/JEDEC
J-STD-020A Specification
DC ELECTRICAL CHARACTERISTICS

(VCC= VCC(MIN)to VCC(MAX), TA= -40°C to +85°C, unless otherwise noted.) (Note 1)
DS1318
Parallel-Interface Elapsed Time Counter
AC ELECTRICAL CHARACTERISTICS
DC ELECTRICAL CHARACTERISTICS
DS1318
Parallel-Interface Elapsed Time Counter
Read Cycle Timing
Write Cycle Timing, Write-Enable Controlled
Write Cycle Timing, Chip-Enable Controlled
DS1318
Parallel-Interface Elapsed Time Counter
Power-Up/Power-Down Timing
POWER-UP/POWER-DOWN CHARACTERISTICS
CAPACITANCE
Typical Operating Characteristics
(VCC= +3.3V, TA= +25°C, unless otherwise noted.)
DS1318
Parallel-Interface Elapsed Time CounterTESTCONDITIONS
WARNING:

Under no circumstances are negative undershoots, of any amplitude, allowed when device is in write protection.
Note 1:
Limits at -40°C are guaranteed by design and not production tested.
Note 2:
All voltages are referenced to ground.
Note 3:
OE, CE, WE, EXT, and A3–A0.
Note 4:
DQ7–DQ0, SQW, and IRQ, when the outputs are high impedance.
Note 5:
Outputs open.
Note 6:
Specified with parallel bus inactive.
Note 7:
Measured with a 32,768kHz crystal attached to the X1 and X2 pins.
Note 8:
The parameter tOSFis the period of time that the oscillator must be stopped for the OSF flag to be set over the voltage
range of 0V ≤VCC≤VCC(MAX)and 1.3V ≤VBACKUP≤3.7V.
Note 9:
This delay applies only if the oscillator is enabled and running. If the ENOSC bit is 0, tRECis disabled, and the device is
immediately accessible. If CEand OEare low on power-up, the DQ outputs are active. Valid data out is not available until
after tREC.
DS1318
Parallel-Interface Elapsed Time Counter
Functional Diagram
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