DS1284 ,Watchdog Timekeeper ChipFEATURES PIN ASSIGNMENT§ Keeps track of hundredths of seconds,INTA 1 28 VCCseconds, minutes, hours, ..
DS1284 ,Watchdog Timekeeper ChipPIN DESCRIPTION§ Optional 28-pin PLCC surface mount package§ Low-power CMOS circuitry is maintained ..
DS1284Q ,Watchdog Timekeeper ChipFEATURES The DS1284/DS1286 watchdog timekeepers are Keeps Track of Hundredths of Seconds, self-co ..
DS1284QN ,Watchdog Timekeeper ChipFEATURES The DS1284/DS1286 watchdog timekeepers are Keeps Track of Hundredths of Seconds, self-co ..
DS1284QN ,Watchdog Timekeeper Chip DS1284/DS1286 Watchdog Timekeepers
DS1284QN+ ,Watchdog TimekeepersFEATURES The DS1284/DS1286 watchdog timekeepers are Keeps Track of Hundredths of Seconds, self-co ..
DTC114TE ,Pre-biased TransistorsMaximum ratings are those values beyond which device damage can occur.M = Date Code
DTC114TE TL , NPN 100mA 50V Digital Transistors (Bias Resistor Built-in Transistors)
DTC114TET1 ,Bias Resistor TransistorTransistor) contains a single transistor with a monolithic bias networkconsisting of two resistors; ..
DTC114TET1G ,Bias Resistor TransistorTransistor) contains a single transistor with a monolithic bias networkconsisting of two resistors; ..
DTC114TK , DTA/DTC SERIES
DTC114TM , NPN 100mA 50V Digital Transistors (Bias Resistor Built-in Transistors)
DS1284
Watchdog Timekeeper Chip
FEATURES Keeps track of hundredths of seconds,seconds, minutes, hours, days, date of the
month, months, and years; valid leap year
compensation up to 2100 Watchdog timer restarts an out-of-control
processor§ Alarm function schedules real-time related
activities Programmable interrupts and square wave
outputs maintain 28-pin JEDEC footprint All registers are individually addressable viathe address and data bus Accuracy is better than ±2 minute/month at
25°C 50 bytes of user NV RAM Optional 28-pin PLCC surface mount package§ Low-power CMOS circuitry is maintained on
less than 0.5 mA when power is supplied from
battery input§ Optional industrial temperature range
available on 28-pin PLCC (-40°C to +85°C)
PIN ASSIGNMENT
PIN DESCRIPTIONINTA - Interrupt Output A (open drain)
INTB(INTB)- Interrupt Output B (open drain)
A0-A5 - Address Inputs
DQ0-DQ7 - Data Input/Output - Chip Enable - Output Enable - Write Enable
VCC - +5 Volts
GND - Ground
NC - No ConnectionSQW - Square Wave Output
X1,X2 - 32.768 kHz Crystal Connections
VBAT - +3 Volt Battery Input
RCLR - RAM Clear
DESCRIPTIONThe DS1284 Watchdog Timekeeper Chip is a self-contained real-time clock, alarm, watchdog timer, and
interval timer in a 28-pin JEDEC DIP package or a 28-pin PLCC surface mount package. An externalcrystal and battery are the only components required to maintain time-of-day and memory status in the
absence of power. For a complete description of operating conditions, electrical characteristics, bus
timing, and pin descriptions other than X1, X2, VBAT, and RCLR, see the DS1286 Watchdog Timekeeper
Watchdog Timekeeper ChipDS1284
DS1284
DQ1DQ2
DQ3DQ5DQ6
12 13 14 15 16 17 18
VBAT
DS1284
PIN DESCRIPTION
X1, X2 - Connections for a standard 32.768 kHz quartz crystal. The internal oscillator circuitry isdesigned for operation with a crystal having a specified load capacitance (CL) of 6 pF. The crystal isconnected directly to the X1 and X2 pins. There is no need for external capacitors or resistors. For more
information on crystal selection and crystal layout considerations, please consult Application Note 58,
“Crystal Considerations with Dallas Real Time Clocks.”
VBAT - Battery input for any standard 3-volt lithium cell or other energy source. Battery voltage must beheld between 2.4 and 3.7 volts for proper operation. The nominal write-protect trip point voltage at which
access to registers containing time, watchdog, alarm, and RAM information is denied is set by internal
circuitry as 1.26 x VBAT. A maximum load of 0.5 mA at 25°C in the absence of power should be used to
size the external energy source. The battery should be connected directly to the VBAT pin. A diode mustnot be placed in series with the battery to the VBAT pin. Furthermore, a diode is not necessary because
reverse charging current protection circuitry is provided internal to the device and has passed the
requirements of Underwriters Laboratories for UL listing. An optional ground pin is provided for
connection to battery negative. This pin should be grounded but can be left floating.
RCLR - The RCLR pin is used to clear (set to logic 1) all 50 bytes of user NV RAM but does not affect
the registers involved with time, alarm, and watchdog functions. In order to clear the RAM, RCLR must
be forced to an input logic 0 (-0. 3 to +0.8 volts) during battery back-up mode when VCC is not applied.
The RCLR function is designed to be used via human interface (shorting to ground or by switch) and not
be driven with external buffers. This pin is internally pulled up and should be left floating when not in
use.
DS1284Q 28-PIN PLCC WATCHDOG TIMEKEEPER
DS1284
DS1284 28-PIN DIP WATCHDOG TIMEKEEPER
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