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DP83266VFNSCN/a12avaiMACSITM Device (FDDI Media Access Controller and System Interface)


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DP83266VF
MACSITM Device (FDDI Media Access Controller and System Interface)
TL/F/11705
DP83266
MACSI
Device
(FDDI
Media
Access
Controller
and
System
Interface)
PRELIMINARY
October 1994
DP83266 MACSITM Device
(FDDI Media Access Controller and System Interface)
General Description
The DP83266 Media Access Controller and System Inter-
face (MACSI) implementsthe ANSI X3T9.5 Standard Media
Access Control (MAC) protocolfor operationinan FDDI
tokenringand providesa comprehensive System Interface.
The MACSI device transmits, receives, repeats,and strips
tokens and frames.It produces and consumes optimized
data structuresfor efficient data transfer.Full duplex archi-
tecture with through parity allows diagnostic transmission
andself testing forerror isolationand point-to-point connec-
tions.
The MACSI device includesthe functionalityof boththe
DP83261 BMACTM deviceandthe DP83265BSI-2TM device
with additional enhancementsfor higher performanceand
reliability.
Features Over9 kBytesof on-chip FIFO5 DMA channels(2 Outputand3 Input) 12.5 MHzto25 MHz operation Full duplex operation with through parity Supports JTAG boundary scan Real-time Void stripping indicatorfor bridges On-chip addressbit swapping capability 32-bit wide Address/Data path with byte parity Programmable transfer burst sizesof4or8
32-bit words Receive frame filtering services Frame-per-Page mode controllableon each
DMA channel Demultiplexed Addresses supportedon ABus New multicast address matching feature ANSI X3T9.5 MAC standard definedring
service options Supportsall FDDI Ring Scheduling Classes
(Synchronous, Asynchronous, etc.) Supports Individual, Group, Short, Longand
External Addressing Generates Beacon, Claim,and Void frames Extensiveringand station statistics gathering Extensionsfor MAC level bridging Enhanced SBus compatibility Interfacesto DRAMsor directlyto systembus Supports frame Header/Info splitting ProgrammableBigor Little Endian alignment
Block Diagram
TL/F/11705–1
FIGURE1-1. FDDI ChipSet Block Diagram
TRI-STATEÉ isaregistered trademarkof National SemiconductorCorporation.
BMACTM, BSI-2TM,MACSITMand PLAYERaTM aretrademarksof National SemiconductorCorporation.
C1995National SemiconductorCorporation RRD-B30M105/PrintedinU.S.A.
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