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DM74S280NNSN/a2678avai9-Bit Parity Generator/Checker


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DM74S280N
7 V, 9-bit parity generator/checker
National _
Semiconductor
DM54S280/DM74S280 9-Bit Parity Generators/Checkers
General Description
These universal, nine-bit parity generatorslcheckers utilize
Schottky-clamped TTL high-performance circuitry, and fea-
ture odd/even outputs to facilitate operation of either odd or
even parity applications. The word-length capability is easily
expanded by cascading.
The 8280 can be used to upgrade the performance of most
systems utilizing the DM74180 parity generator/checker. Al-
though the 8280 is implemented without expander inputs,
the corresponding function Is provided by the availability of
all input at pin 4, and no Internal connection at pin 3. This
permits the S280 to be substituted for the 180 in existing
designs to produce an identical function, even if 8280's are
mixed with existing 18tys.
Input butters are provided so that each input represents
only one normal 743 load, and full fan-out to 10 normal
Series 74S loads is available from each of the outputs at
low logic levels. A tawout to 20 normal Series 74S loads is
provided at high logic levels, to facilitate connection of un-
used inputs to used inputs.
Features
tt Generates elther odd or even parity for nine data lines
a Cascadable for N-bits
I: Can be used to upgrade existing systems using MSI
parity circuits
a Typical data-to-output dsslay--14 ns
Connection Diagram
Dual-ln-Llne Package
INPUTS
Vcc F E o c a A ,
l " " 12 tl 10 e I a
1 2 F 4 5 a l ,
G H NC I E 2 sun
u-v--- INPUT EVEN ODD
INPUTS
OUTPUYS
TL/F/6483-1
Order Number DM548280J, DM545280W, DM745280M or DM748280N
See NS Package Number J14A, M1411, N14A or W148
Function Table
Number of Inputs (A Outputs
Thru " that are High E Even E Odd
o, 2, 4, 6, 6 H L
l, 3, 5, 7, 9 L H
Absolute Maximum Ratings (Note)
If MllltttryfAeroapaetr ttpeelfled devices are required,
please contact the National Semiconductor Sales
Off1tNuDlatrtttutora for avallablllty and speelfleatlomt.
Supply Voltage 7V
Input Voltage 5.5V
Note: The "Absolute Maximum Ratings" are those values
beyond which the safety of the device cannot be guaran-
teed. The device should not be operated at these limits. The
parametric values defined in the "Electrical Characteristics"
table are not guaranteed at the absolute maximum ratings.
The "Recommended Operating Conditions " table will define
Operating Free Air Temperature Range
Storage Temperature Range
_ 55''C to + 125°C
0''C to + 70°C
-65'C to + 150°C
Recommended Operating Conditions
the conditions for actual device operation.
Symbol Parameter DMMS280 DM74S280 Unlts
Min Norn Max Mln Nam Max
Vcc Supply Voltage 4.5 5 5.5 4.75 5 5.25 V
Ihr, High Level Input Voltage 2 2
" Low Level Input Voltage 0.8 0.8 V
loH High Level Output Current - 1 - 1 mA
IOL Low Level Output Current 20 20 mA
TA Free Air Operating Temperature - 55 125 0 70 ''C
Electrical Characteristics over recommended operating free air temperature range (unless otherwise noted)
Symbol Parameter Condl Ions Mln (Note 1) Max Unlts
VI Input Clamp Voltage Vcc = Min, Il= - 18 mA -1.2 V
VOH High LevelOutput Vcc = Min, ton = Max 2 7 3 4 V
Voltage " = Max,1hH = Min . .
VOL Low Level Output Vcc = Min, IOL =Max 0 5 V
Voltage VIH = Min, " = Max .
ll lnputCurrent © Max Vcc = Max, V. = 5.5V
Input Voltage
Im High Level Input Current VCC = Max, VI = 2.7V 50 WA
IIL Low Level lnputCurrent Vcc = Max, VI = 0.5V -2 mA
los Short Circuit Vcc = Max DM54 -40 - 100 m A
Output Current (Note 2) DM74 - 40 _ 100
ICC Supply Current Vcc Max (Note 3) 67 105 mA
Note 1: All typicals are at Voc = W, TA = 25°C.
Note 2: Nat more than one output should be shorted at a time, and the duration should not exceed one second.
Note 3: tat is measured with all inputs grounded and all outputs open.
Switchlng Characteristics at Vcc == 5V and TA = 25''C (See Section 1 for Test Waveforms and Output Load)
From (Input) Rt. = 2800 EL = 280ft
Symbol Parameter To (Output) Cu = " pF th. = so pF Units
Mln Max Min Max
tpLH Propagation Delay Time Data to 21 24 ns
Low to High Level Output E Even
IPHL Propagation Delay Time Data to 1 8 21 ns
High to Low Level Output 2 Even
tpLH Propagation Delay Time Data to 21 24 ns
Low to High Level Output E Odd
tpHL Propagation Delay Time Data to 1 8 21 ns
High to Low Level Output E Odd
Logic Diagram
c (10) (5) E
TUF/6463-2
Typical Applications
Three 8280's can be used to implement a 25-Iine parity
generator/checker. This arrangement will provide parity in
typically 25 ns. (See Figure f.)
As an alternative. the outputs of two or three parity genera-
tors/checkers can be decoded with a 2-input (S86) or
-zawmunn,
-3¢;mnuocsua
Illllllll
—zomma0m>
TL/F/6483-3
FIGURE 1. 25-Llne ParltylGenerator Checker
3-input (S135) exclusive-OR gate for 18 or 27-Iine parity ap-
plications.
Longer word lengths can be implemented by cascading
8280's. As shown in Figure 2, parity can be generated for
word Itsngths up to 81 bits in typically 25 ns.
EVEN 1
-xoumonw>
EVEN L=ODD
Hlllllll
~xonmonu)
4ibmmonm>
h__.___a
T00THER
S2BO'S
—xo~nmonu>
TL/F/6483-4
FIGURE 2. 81-Llne Parity/Generator Checker
This datasheet has been :
www.ic-phoenix.com
Datasheets for electronic components.
National Semiconductor was acquired by Texas Instruments.
corp/docs/irwestor_relations/Pr_09_23_201 1_national_semiconductor.html
This file is the datasheet for the following electronic components:
DM74S280N - product/dm745280n?HQS=T|-null-nulI-dscatalog-df-pf-null-wwe
DM54S280J - product/dm545280j?HQS=T|-nulI-nulI-dscatalog-df—pf—nuII-wwe
DM54S280W - product/dm545280w?HQS=T|-nu|I-nulI-dscatalog-df—pf—null-wwe
DM74S280M - product/dm743280m?HQS=T|-nu|I-nuII-dscatalog-df—pf—nuIl-wwe
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