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DM5403J-DM7403N
Quad 2-Input NAND Gates with Open-Collector Outputs
TL/F/6493
DM5403/DM7403
Quad
2-Input
NAND
Gates
with
Open-Collector
Outputs
June 1989
DM5403/DM7403 Quad 2-Input NAND Gates
with Open-Collector Outputs
General Description
This device contains four independent gates eachof which
performsthe logic NAND function. The open-collectorout-
puts require external pull-up resistorsfor proper logicalop-
eration.
Pull-Up Resistor Equations
RMAXe VCC (Min)b VOH (IOH)a N2(IIH)
RMINe VCC (Max)bVOL
IOLbN3(IIL)
Where:N1 (IOH)e total maximum output high currentforall
outputstiedto pull-up resistor (IIH)e total maximum input high currentforall
inputstiedto pull-up resistor (IIL)e total maximum inputlow currentforall
inputstiedto pull-up resistor
Connection Diagram
Dual-In-Line Package
TL/F/6493–1
Order Number DM5403Jor DM7403N
SeeNSPackage Number J14Aor N14A
Function TableeAB
Inputs Output Y H H H LeHigh Logic LeveleLow Logic Level
C1995National SemiconductorCorporation RRD-B30M105/PrintedinU.S.A.
