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DG528CJHARN/a36avaiAnalog CMOS Latchable Multiplexers
DG528CWNMAXIMN/a23avai8-Channel Latchable Multiplexers
DG528DNSIN/a100avai8-Channel Latchable Multiplexers
DG528EWNMAXIMN/a11avai8-Channel Latchable Multiplexers
DG529CWNN/a7avai8-Channel Latchable Multiplexers


DG528DN ,8-Channel Latchable MultiplexersFeaturesMaxim’s DG528/DG529 are monolithic, 8-channel,' Low-Power, Monolithic CMOS DesignCMOS multi ..
DG528EWN ,8-Channel Latchable MultiplexersApplicationsPART TEMP. RANGE PIN-PACKAGEDG528CJ 0°C to +70°C 18 Plastic DIPData-Acquisition Systems ..
DG529 ,Analog CMOS Latchable MultiplexersApplicationscan be tied to address decoding circuitry for memory mappedoperation. The RS pin is use ..
DG529AK ,8-Channel Latchable MultiplexersELECTRICAL CHARACTERISTICS(V+ = 15V, V- = -15V, V = 2.4V, WR = 0V, RS = 2.4V, T = T to T , unless o ..
DG529BY ,Analog CMOS Latchable MultiplexersApplicationscan be tied to address decoding circuitry for memory mappedoperation. The RS pin is use ..
DG529CJ ,Analog CMOS Latchable MultiplexersFeatures Description• Direct RESET The DG526, DG527, DG528, and DG529 are CMOSMonolithic 16-Channel ..
DS1005-200 ,5-Tap Silicon Delay LineFEATURES PIN ASSIGNMENT All-silicon time delayIN 1 14 V IN 1 16 VCC CC 5 taps equally spacedNC 2 ..
DS1005-250 ,5-Tap Silicon Delay LineDS10055-Tap Silicon Delay Linewww.dalsemi.com
DS1005-75 ,5-Tap Silicon Delay LineFEATURES PIN ASSIGNMENT All-silicon time delayIN 1 14 V IN 1 16 VCC CC 5 taps equally spacedNC 2 ..
DS1005-75 ,5-Tap Silicon Delay LinePIN DESCRIPTIONTAP 1-TAP 5 - TAP Output NumberV - +5 VoltsCCGND - GroundNC - No ConnectionIN - Inpu ..
DS1005H-60 ,5-Tap Silicon Delay LineFEATURES PIN ASSIGNMENT All-silicon time delayIN 1 14 V IN 1 16 VCC CC 5 taps equally spacedNC 2 ..
DS1005H-75 ,5-Tap Silicon Delay LineELECTRICAL CHARACTERISTICS (0°C to 70°C; V = 5.0V ± 5%)CCPARAMETER SYM TEST MIN TYP MAX UNITS NOTES ..


DG528CJ-DG528CWN-DG528DN-DG528EWN-DG529CWN
8-Channel Latchable Multiplexers
_______________General Description
Maxim’s DG528/DG529 are monolithic, 8-channel,
CMOS multiplexers with on-board address and control
latches that simplify design and reduce board space in
microprocessor-based applications. The DG528 is a
single-ended, 1-of-8 multiplexer, while the DG529 is a
differential, 2-of-8 multiplexer. These devices can oper-
ate as multiplexers or demultiplexers.
The DG528/DG529 have break-before-make switching
to prevent momentary shorting of the input signals.
Each device operates with dual supplies (±4.5V to
±20V) or a single supply (+5V to +30V). All logic inputs
are TTL and CMOS compatible. The Maxim
DG528/DG529 are pin and electrically compatible with
the industry-standard DG528/DG529.
________________________Applications

Data-Acquisition Systems
Automatic Test Equipment
Avionics and Military Systems
Communication Systems
Microprocessor-Controlled Systems
Audio-Signal Multiplexing
____________________________Features
Low-Power, Monolithic CMOS DesignOn-Board Address LatchesBreak-Before-Make Input SwitchesTTL and CMOS Logic CompatibleMicroprocessor-Bus CompatiblerDS(ON)< 400ΩPin and Electrically Compatible with the Industry-
Standard DG528/DG529 and ADG528/ADG529
DG528/DG529
8-Channel Latchable Multiplexers
________________________________________________________________Maxim Integrated Products1
_________________Pin Configurations__________Typical Operating Circuit
Call toll free 1-800-998-8800 for free samples or literature.

19-3519; Rev 0; 3/91
DG528/DG529
8-Channel Latchable Multiplexers_______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS

(V+ = 15V, V- = -15V, VEN= 2.4V, WR= 0V, RS= 2.4V, TA= TMINto TMAX, unless otherwise noted.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Voltage Referenced to V-....................................................................................+44V
GND.................................................................................+25V
Digital Inputs VS, VD.................................................V- -2V to V+ +2V
or 20mA, whichever occurs first.
Current (any terminal, except S or D).................................30mA
Continuous Current, S or D
Peak Current, S or D...........................................................20mA
(pulsed at 1ms, 10% duty cycle max)............................50mA
Continuous Power Dissipation (TA= +70°C) (Note 1)
18-Pin Plastic DIP (derate 11.11mW/°C above +70°C)...889mW
18-Pin Wide SO (derate 9.52mW/°C above +70°C)....762mW
18-Pin CERDIP (derate 10.53mW/°C above +70°C)....842mW
20-Pin PLCC (derate 10.00mW/°C above +70°C).......800mW
20-Pin LCC (derate 9.09mW/°C above +70°C)...........727mW
Operating Temperature Ranges
DG52_C_............................................................0°C to +70°C
DG52_D_/E_....................................................-40°C to +85°C
DG52_A_.......................................................-55°C to +125°C
Storage Temperature Range.............................-65°C to +150°C
Lead Temperature (soldering, 10sec).............................+300°C
Note 1:
All leads are soldered or welded to PCboard.
DG528/DG529
8-Channel Latchable Multiplexers
_______________________________________________________________________________________3
Note 2:
Guaranteed by design.
Note 3:
Sequence each switch on.
Note 4:
ID(ON)is leakage from driver into on switch.
Note 5:
Reset pulse period must be at least 50µs during or after power-on.
ELECTRICAL CHARACTERISTICS

(V+ = 15V, V- = -15V, VEN= 2.4V, WR= 0V, RS= 2.4V, TA= TMINto TMAX, unless otherwise noted.)
DG528/DG529
8-Channel Latchable Multiplexers_______________________________________________________________________________________

Figure 1. Transition-Time Test Circuits
Figure 2. Open-Time (B.B.M.) Interval Test Circuit
DG528/DG529
8-Channel Latchable Multiplexers
_______________________________________________________________________________________5

Figure 3. Enable tON/tOFFTime Test Circuit
Figure 4. Write Turn-On Time tON(WR)Test Circuit
DG528/DG529
8-Channel Latchable Multiplexers_______________________________________________________________________________________

Figure 5. Reset Turn-Off Time tOFF(RS)Test Circuit
Figure 7. Typical Timing Diagrams for DG528/DG529
Figure 6. Charge-Injection Test Circuit
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