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DAC8718SRGZT
Octal, Low power, 16-bit, +/-16.5V Output Serial Input Digital-to-Analog Converter
DAC8718
DAC8718
www.ti.com SBAS467A –MAY 2009–REVISED DECEMBER 2009
Octal, 16-Bit, Low-Power, High-Voltage Output, Serial Input
DIGITAL-TO-ANALOG CONVERTER
Checkfor Samples: DAC8718
2345• Bipolar Output: ±2Vto ±16.5V The DAC8718 is a low-power, octal, 16-bit
digital-to-analog converter (DAC). With a 5V
• Unipolar Output: 0Vto +33Vreference, the output can either bea bipolar ±15V
• 16-Bit Resolution voltage when operating from dual ±15.5V (or higher)
• Low Power: 14.4mW/Ch (Bipolar Supply) power supplies, ora unipolar 0V to +30V voltage
Relative Accuracy:4 LSB Max when operating froma +30.5V (or higher) power
supply. Witha 5.5V reference, the output can either
• Low Zero/Full-Scale Error bea bipolar ±16.5V voltage when operating from dual
– Before User Calibration: ±10 LSB Max ±17V (or higher) power supplies,ora unipolar 0Vto
After User Calibration:±1 LSB +33V voltage when operating froma +33.5V (or
higher) power supply. This DAC provides low-power
• Flexible System Calibration operation, good linearity, and low glitch over the
• Low Glitch: 4nV-s specified temperature rangeof –40°Cto +105°C. This
• Settling Time: 15μs deviceis trimmedin manufacturing and has very low
zero-code and gain error.In addition, system level
• Channel Monitor Output calibration can be performed to achieve ±1 LSB
• Programmable Gain: x4/x6 bipolar zero/full-scale error with bipolar supplies,or
• Programmable Offset ±1 LSB zero code/full-scale error witha unipolar
supply, over the entire signal chain. The output range
• SPI™: Upto 50MHz, 1.8V/3V/5V Logiccanbe offsetby using the DAC offset register.
• Schmitt Trigger InputsThe DAC8718 featuresa standard, high-speed serial
• Daisy-Chain with Sleep Mode Enhancement peripheral interface (SPI) that operates at up to
• Packages: QFN-48 (7x7mm), TQFP-64 50MHz andis 1.8V, 3V, and 5V logic compatible,to
(10x10mm) communicate witha DSP or microprocessor. The
input data of the device are double-buffered. An
APPLICATIONS asynchronous load input (LDAC) transfers data from
Automatic Test Equipment the DAC data register to the DAC latch. The
asynchronous CLR input sets the outputofall eight
• PLC and Industrial DACsto AGND. The VMON pinisa monitor output individual analog outputs, the buffer outputs, and twoa multiplexer (mux). function-compatible DAC7718 (12-bit).
