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DAC8412EP-DAC8412FP-DAC8412FPC-DAC8413EP-DAC8413FP-DAC8413FPC
Quad, 12-Bit DAC Voltage Output with Readback
REV.D
Quad, 12-Bit DAC
Voltage Output with Readback
FUNCTIONAL BLOCK DIAGRAM
VREFH
VOUTA
VDD
VOUTB
VOUTC
VOUTD
VREFLVSS
VLOGIC
DGND
DATA
I/O
R/W
RESET
LDAC
FEATURES
+5 V to �15 V Operation
Unipolar or Bipolar Operation
True Voltage Output
Double-Buffered Inputs
Reset to Min (DAC8413) or Center Scale (DAC8412)
Fast Bus Access Time
Readback
APPLICATIONS
Automatic Test Equipment
Digitally Controlled Calibration
Servo Controls
Process Control Equipment
GENERAL DESCRIPTION

The DAC8412 and DAC8413 are quad, 12-bit voltage output
DACs with readback capability. Built using a complementary
BiCMOS process, these monolithic DACs offer the user very
high package density.
Output voltage swing is set by the two reference inputs VREFH
and VREFL. By setting the VREFL input to 0 V and VREFH to a
positive voltage, the DAC will provide a unipolar positive output
range. A similar configuration with VREFH at 0 V and VREFL at
a negative voltage will provide a unipolar negative output range.
Bipolar outputs are configured by connecting both VREFH and
VREFL to nonzero voltages. This method of setting output voltage
range has advantages over other bipolar offsetting methods because
it is not dependent on internal and external resistors with different
temperature coefficients.
Digital controls allow the user to load or read back data from any
DAC, load any DAC and transfer data to all DACs at one time.
An active low RESET loads all DAC output registers to mid-
scale for the DAC8412 and zero scale for the DAC8413.
The DAC8412/DAC8413 are available in 28-lead plastic DIP,
PLCC and LCC packages. They can be operated from a wide
variety of supply and reference voltages with supplies ranging
from single +5 V to ±15 V, and references from +2.5 V to ±10 V.
Power dissipation is less than 330 mW with ±15 V supplies and
only 60 mW with a +5 V supply.
For MIL-STD-883 applications, contact your local ADI sales
office for the DAC8412/DAC8413/883 data sheet which specifies
operation over the –55°C to +125°C temperature range. All
883 parts are also available on Standard Military Drawings
5962-91 76401MXA through 76404M3A.
Figure 1.INL vs. Code Over Temperature
DAC8412/DAC8413–SPECIFICATIONS
ELECTRICAL CHARACTERISTICS

NOTESAll supplies can be varied ±5%, and operation is guaranteed. Device is tested with nominal supplies.Operation is guaranteed over this reference range, but linearity is neither tested nor guaranteed.All parameters are guaranteed by design.All input control signals are specified with tr = tf = 5 ns (10% to 90% of +5 V) and timed from a voltage level of 1.6 V.
(@ VDD = +15.0 V, VSS = –15.0 V, VLOGIC = +5.0 V, VREFH = +10.0 V, VREFL = –10.0 V,
–40�C ≤ TA ≤ +85�C unless otherwise noted. See Note 1 for supply variations.)
DAC8412/DAC8413
(@ VDD = VLOGIC = +5.0 V � 5%, VSS = 0.0 V, VREFH = +2.5 V, VREFL = 0.0 V, and VSS = –5.0 V � 5%,
VREFL = –2.5 V, –40�C ≤ TA ≤ +85�C unless otherwise noted. See Note 1 for supply variations.)ELECTRICAL CHARACTERISTICS

REFERENCE
LOGIC CHARACTERISTICS
NOTES
1All supplies can be varied ±5%, and operation is guaranteed. Device is tested with VDD = +4.75 V.
DAC8412/DAC8413
Figure 2.Data Output (Read Timing)
Figure 3.Data WRITE (Input and Output Registers) Timing
Figure 4.Single Buffer Mode
Figure 5.Double Buffer Mode
Figure 6.Burn-In Diagram
ABSOLUTE MAXIMUM RATINGS
(TA = +25°C unless otherwise noted)
VSS to VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V, +33.0 V
VSS to VLOGIC . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V, +33.0 V
VLOGIC to DGND . . . . . . . . . . . . . . . . . . . . . . –0.3 V, +7.0 V
VSS to VREFL . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V, +VSS–2.0 V
VREFH to VDD . . . . . . . . . . . . . . . . . . . . . . . . . +2.0 V, +33.0 V
VREFH to VREFL . . . . . . . . . . . . . . . . . . . . . . . . +2.0 V, VSS–VDD
Current into Any Pin 4 . . . . . . . . . . . . . . . . . . . . . . . . ±15 mA
Digital Input Voltage to DGND . . . . . –0.3 V, VLOGIC +0.3 V
Digital Output Voltage to DGND . . . . . . . . . . –0.3 V, +7.0 V
Operating Temperature Range
ET, FT, EP, FP, FPC . . . . . . . . . . . . . . . . –40°C to +85°C
AT, BT, BTC . . . . . . . . . . . . . . . . . . . . . –55°C to +125°C
Dice Junction Temperature . . . . . . . . . . . . . . . . . . . . . +150°C
Storage Temperature . . . . . . . . . . . . . . . . . . –65°C to +150°C
Power Dissipation Package . . . . . . . . . . . . . . . . . . . 1000 mW
Lead Temperature (Soldering, 60 sec) . . . . . . . . . . . . +300°C
CAUTION
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the
device. This is a stress rating only; functional operation at or above this specification is not implied.
Exposure to the above maximum rating conditions for extended periods may affect
device reliability.Digital inputs and outputs are protected, however, permanent damage may occur on unprotected units
from high-energy electrostatic fields. Keep units in conductive foam or packaging at all times until
ready to use. Use proper antistatic handling procedures.Remove power before inserting or removing units from their sockets.Analog outputs are protected from short circuit to ground or either supply.
Thermal Resistance

*θJA is specified for worst-case mounting conditions, i. e., θJA is specified for device
in socket.
ORDERING INFORMATION1, 2

NOTESDie Size 0.225 × 0.165 inches, 37,125 sq. mils (5.715 × 4.191 mm, 23.95 sq. mm). Substrate should be connected to VDD; Transistor Count = 2595.Burn-in is available on extended industrial temperature range parts in cerdip.A complete /883 data sheet is available. For availability and burn-in information, contact your local sales office.
DAC8412/DAC8413
PIN CONFIGURATIONS
Plastic DIP
PLCC
DGND
RESET
LDAC
DB0 (LSB)
DB1
DB2
DB3
VDD
VLOGIC
R/W
DB11 (MSB)
OUTA
OUTB
REFH
REFL
OUTC
OUTD
DB4DB5DB6DB7DB8DB9
DB10
LCC
VDD
VLOGIC
R/W
DB11 (MSB)
DGND
RESET
LDAC
DB0 (LSB)
DB1
DB2
DB3
DB4DB5DB6DB7DB8DB9
DB10
OUTA
OUTB
REFH
REFL
OUTC
OUTD
DAC8412TC
DAC8413TC
TOP VIEW
(NOT TO SCALE)
PIN FUNCTION DESCRIPTIONS

2VOUTB
3VOUTA
4VSS
Figure 7.DNL vs. VREFH
Figure 10.INL vs. VREFH
Figure 13.Full-Scale Error vs.
Temperature
Figure 8.DNL vs. VREFH
Figure 11.Full-Scale Error vs.
Time Accelerated by Burn-In
Figure 14.Zero-Scale Error vs.
Temperature
Figure 9.INL vs. VREFH
Figure 12.Zero-Scale Error vs.
Time Accelerated by Burn-In
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