DAC5681IRGCT ,16-Bit, 1.0 GSPS Digital-To-Analog Converter (DAC) 64-VQFN -40 to 85 SLLS864C –AUGUST 2007–REVISED AUGUST 2012DAC5681RGC PACKAGE(TOP VIEW)1 48 SDENBCLKVDD2 47CLKIN SCL ..
DAC5681ZIRGCR ,16-Bit, 1.0 GSPS 2x-4x Interpolating Digital-To-Analog Converter (DAC) 64-VQFN -40 to 85 SLLS865G–AUGUST 2007–REVISED NOVEMBER 20155 Pin Configuration and FunctionsRGC Package64-Pin VQFNT ..
DAC5681ZIRGCT ,16-Bit, 1.0 GSPS 2x-4x Interpolating Digital-To-Analog Converter (DAC) 64-VQFN -40 to 85Block Diagram... 1712 Mechanical, Packaging, and Orderable7.3 Feature Description.... 17Information ..
DAC5681ZIRGCT ,16-Bit, 1.0 GSPS 2x-4x Interpolating Digital-To-Analog Converter (DAC) 64-VQFN -40 to 85Features 3 DescriptionThe DAC5681Z is a 16-bit 1.0 GSPS digital-to-analog1• 16-Bit Digital-to-Analo ..
DAC5682ZIRGCR ,16-Bit, 1.0 GSPS 2x-4x Interpolating Dual-Channel Digital-To-Analog Converter (DAC) 64-VQFN -40 to 85 SLLS853F–AUGUST 2007–REVISED JANUARY 2015Changes from Revision B (April 2008) to Revision C Page• ..
DAC5682ZIRGCT ,16-Bit, 1.0 GSPS 2x-4x Interpolating Dual-Channel Digital-To-Analog Converter (DAC) 64-VQFN -40 to 85Features 3 DescriptionThe DAC5682Z is a dual-channel 16-bit 1.0 GSPS1• 16-Bit Digital-to-Analog Con ..
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DAC5681IRGCR-DAC5681IRGCT
16-Bit, 1.0 GSPS Digital-To-Analog Converter (DAC)
DAC5681
www.ti.com SLLS864C –AUGUST 2007–REVISED AUGUST 2012
16-BIT, 1.0 GSPS Digital-to-Analog Converter (DAC)
Checkfor Samples: DAC5681
1FEATURES DESCRIPTIONThe DAC5681isa 16-bit 1.0 GSPS digital-to-analog
• 16-Bit Digital-to-Analog Converter (DAC) converter (DAC) with wideband LVDS data input and
• 1.0 GSPS Update Rate internal voltage reference. The DAC5681 offers
16-Bit Wideband Input LVDS Data Bus superior linearity and noise performance.
8 Sample Input FIFO The DAC5681 integratesa wideband LVDS port with
On-Chip Delay Lock Loop on-chip termination, providing full 1.0 GSPS data
transfer into the DAC and lower EMI than traditional
• High Performance CMOS data interfaces. An on-chip delay lock loop
– 73 dBc ACLR WCDMA TM1at 180 MHz (DLL) simplifies LVDS interfacing by providing skew
On Chip 1.2V Reference controlfor the LVDS input data clock.
Differential Scalable Output:2to 20 mA The current-steering architecture of the DAC5681
Package: 64-Pin9×9 mm QFN consists ofa segmented array of current sinking
switches directing upto 20mAof full-scale currentto
complementary output nodes. An accurate on-chip
APPLICATIONS voltage referenceis temperature-compensated and
• Cellular Base Stations deliversa stable 1.2-V reference voltage. Optionally,
Broadband Wireless Access (BWA) an external reference maybe used.
WiMAX 802.16 The DAC5681is characterized for operation over the
Fixed Wireless Backhaul industrial temperature rangeof –40°Cto 85°C andis
availableina 64-pin QFN package. The deviceis pin
• Cable Modem Termination System (CMTS) upgradeableto the other membersof the family: the
• Medical/ Test Instrumentation DAC5681Z and DAC5682Z. The single-channel
Radar Systems DAC5681Z and dual-channel DAC5682Z both
provide optional 2x/4x interpolation anda clock
multiplying PLL.
ORDERING INFORMATION
