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DAC5675AIPHPTIN/a10avai14-Bit, 400-MSPS Digital-to-Analog Converter 48-HTQFP -40 to 85


DAC5675AIPHP ,14-Bit, 400-MSPS Digital-to-Analog Converter 48-HTQFP -40 to 85features a low differential voltage swing• Differential Scalable Current Sink Outputs: 2mA towith a ..
DAC5675IPHP ,14-Bit, 400 MSPS DAC With LVDS, Best DAC Performance in IndustryFEATURES DESCRIPTION 400-MSPS Update RateThe DAC5675 is a 14-bit resolution high-speed LVDS-Compa ..
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DAC5681IRGCT ,16-Bit, 1.0 GSPS Digital-To-Analog Converter (DAC) 64-VQFN -40 to 85 SLLS864C –AUGUST 2007–REVISED AUGUST 2012DAC5681RGC PACKAGE(TOP VIEW)1 48 SDENBCLKVDD2 47CLKIN SCL ..
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DAC5675AIPHP
14-Bit, 400-MSPS Digital-to-Analog Converter 48-HTQFP -40 to 85
Bandgap
Reference
1.2V
ControlAmp
Current
Source
Array
Output
Current
Switches
Drivers
DecoderInput
Latches
LVDS
Input
Interface
DAC5675A
SLEEP
EXTIO
BIASJ
D[13:0]A
D[13:0]B
CLK
DAC
Latch
Product
Folder
Sample &
Buy
Technical
Documents
DAC5675A 14-Bit, 400-MSPS Digital-to-Analog Features
400MSPS Update Rate LVDS-Compatible Input Interface Spurious-Free Dynamic Range (SFDR)to
Nyquist: 69dBcat 70MHzIF, 400MSPS W-CDMA Adjacent Channel Power Ratio (ACPR): 73dBcat 30.72MHzIF, 122.88MSPS 71dBcat 61.44MHzIF, 245.76MSPS Differential Scalable Current Sink Outputs: 2mAto
20mA On-Chip 1.2V Reference Single 3.3V Supply Operation Power Dissipation: 660mWat fCLK= 400MSPS,
fOUT= 20MHz Package: 48-Pin HTQFP PowerPad™,
TJA= 28.8°C/W Applications Cellular Base Transceiver Station Transmit
Channel: CDMA: WCDMA, CDMA2000, IS-95 TDMA: GSM, IS-136, EDGE/GPRS Supports Single-Carrier and Multicarrier
Applications Test and Measurement: Arbitrary Waveform
Generation Direct Digital Synthesis (DDS) Cable Modem Headend Description
The DAC5675Aisa 14-bit resolution high-speed
digital-to-analog converter. The DAC5675A is
designed for high-speed digital data transmissionin communication systems, high- synthesis (DDS), andin test and measurement has excellent spurious- high well-suited and CDMA- (BTSs).
The
voltage
fCLK=
provides
output
differential
directly
output
analog
The DAC5675A
signaling
input.
with
frequency,
with low noise levels; thatis, with low electromagnetic
interference (EMI). LVDSis typically implementedin
low-voltage digital CMOS processes, makingit the
ideal technology for high-speed interfacing between
the DAC5675A and high-speed low-voltage CMOS
ASICsor FPGAs. The DAC5675A current-sink-array
architecture supports update ratesofupto 400MSPS.
On-chip edge-triggered input latches provide for
minimum setup and hold times, thereby relaxing
interface timing.
Device Information(1)

(1) Forall available packages, see the orderable addendumat
the endofthe data sheet.
Simple Schematic
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