| Partno |
Mfg |
Dc |
Qty |
Available | Descript |
| CY7C1514V18-200BZXC |
CY|Cypress |
N/a |
97 |
 |
72-Mbit QDR-II™ SRAM 2-Word Burst Architecture |
CY7C1514V18-250BZC CYPRESS, 72-Mbit QDR-II™ SRAM 2-Word Burst Architecture
CY7C1514V18-250BZXC CYPRESS, 72-Mbit QDR-II™ SRAM 2-Word Burst Architecture
CY7C1515AV18-200BZC CYPRESS, 72-Mbit QDR™-II SRAM 4-Word Burst Architecture
CY7C1515AV18-200BZXI CYPRESS, 72-Mbit QDR™-II SRAM 4-Word Burst Architecture
CY7C1515AV-200BZXI CYPRESS
CY7C1515JV18-300BZC CYPRESS, 72-Mbit QDR-II SRAM 4-Word Burst Architecture
CY7C1514V18-200BZXC , 72-Mbit QDR-II™ SRAM 2-Word Burst Architecture
CY7C1515KV18-250BZC ,72-Mbit QDR?II SRAM Four-Word Burst ArchitectureFeatures Configurations Separate independent read and write data ports CY7C1526KV18 – 8 M × 9❐ Supp ..
CY7C1515KV18-250BZXC ,72-Mbit QDR?II SRAM Four-Word Burst ArchitectureFeatures Configurations Separate independent read and write data ports CY7C1526KV18 – 8 M × 9❐ Supp ..
CY7C1515KV18-300BZC ,72-Mbit QDR?II SRAM Four-Word Burst ArchitectureCY7C1526KV18CY7C1513KV18CY7C1515KV18®72-Mbit QDR II SRAM Four-WordBurst Architecture72-Mbit QDR® II ..
CY7C1515KV18-300BZI ,72-Mbit QDR?II SRAM Four-Word Burst ArchitectureFunctional Description Double data rate (DDR) interfaces on both read and write portsThe CY7C1526KV ..
D5C031-50 , 300 gate CMOS pld
D5C031-50 , 300 gate CMOS pld
D5C032-30 , 8-MACROCELL CMOS PLD
