| Partno |
Mfg |
Dc |
Qty |
Available | Descript |
| CY7C12651KV18-450BZXC |
CY|Cypress |
N/a |
250 |
 |
36-Mbit QDR® II SRAM 4-Word Burst Architecture (2.0 Cycle Read Latency) |
CY7C12651KV18-450BZXC , 36-Mbit QDR® II SRAM 4-Word Burst Architecture (2.0 Cycle Read Latency)
CY7C1265KV18-400BZC ,36-Mbit QDR?II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency)Functional Description Double data rate (DDR) Interfaces on both read and write portsThe CY7C1263KV ..
CY7C1265KV18-450BZXC ,36-Mbit QDR?II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency)Block Diagram – CY7C1265KV1836D[35:0]WriteWrite Write Write18AddressAReg Reg Reg Reg(17:0)Register1 ..
CY7C1268KV18-400BZXC ,36-Mbit DDR II+ SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency)Characteristics . 22Write Cycle Descriptions ....8 Switching Waveforms ....... 23Write Cycle Descri ..
CY7C1268KV18-550BZXC ,36-Mbit DDR II+ SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency)Functional Description1100 MHz) at 550 MHz The CY7C1268KV18, and CY7C1270KV18 are 1.8 V Available i ..
D3FJ10 , Schottky Barrier Diode
D3FJ10 , Schottky Barrier Diode
D3FP3 , Schottky Rectifiers (SBD) (30V 3A)
