| Partno |
Mfg |
Dc |
Qty |
Available | Descript |
| CY7C12481KV18-400BZC |
CY|Cypress |
N/a |
60 |
 |
36-Mbit DDR II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency) |
CY7C12481KV18-400BZXC CY
CY7C12481KV18-400BZC , 36-Mbit DDR II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency)
CY7C1248KV18-400BZXC ,36-Mbit DDR II+ SRAM Two-Word Burst Architecture (2.0 Cycle Read Latency)Block Diagram – CY7C1250KV18Write Write19AReg Reg(18:0)AddressRegister36LDKOutputCLK R/WLogicKGen.C ..
CY7C1248KV18-450BZXC ,36-Mbit DDR II+ SRAM Two-Word Burst Architecture (2.0 Cycle Read Latency)Features Configurations 36-Mbit density (2 M × 18, 1 M × 36) With Read Cycle Latency of 2.0 Cycles: ..
CY7C12501KV18-400BZC , 36-Mbit DDR II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency)
CY7C1250KV18-400BZC ,36-Mbit DDR II+ SRAM Two-Word Burst Architecture (2.0 Cycle Read Latency)Characteristics . 22Write Cycle Descriptions ....8 Switching Waveforms ....... 23Write Cycle Descri ..
D38NH02L , N-channel 24V - 0.011ohm - 38A - DPAK/IPAK STripFET TM III Power MOSFET
D3FJ10 , Schottky Barrier Diode
D3FJ10 , Schottky Barrier Diode
