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CY7C1163KV18-400BZI |CY7C1163KV18400BZICYN/a4avai18-Mbit QDR?II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency)
CY7C1165KV18-400BZC |CY7C1165KV18400BZCCYPRESSN/a20avai18-Mbit QDR?II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency)
CY7C1165KV18-400BZXC |CY7C1165KV18400BZXCCYN/a4avai18-Mbit QDR?II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency)
CY7C1165KV18-550BZXC |CY7C1165KV18550BZXCCYN/a6avai18-Mbit QDR?II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency)


CY7C1165KV18-400BZC ,18-Mbit QDR?II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency)Features Configurations Separate independent read and write data ports With Read Cycle Latency of 2 ..
CY7C1165KV18-400BZXC ,18-Mbit QDR?II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency)Characteristics . 23Write Cycle Descriptions ....9 Switching Waveforms ....... 24Write Cycle Descri ..
CY7C1165KV18-550BZXC ,18-Mbit QDR?II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency)Block Diagram – CY7C1165KV1836D[35:0]Write Write Write Write17AddressAReg Reg Reg Reg(16:0)Register ..
CY7C11681KV18-400BZC , 18-Mbit DDR II SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency)
CY7C1168KV18-400BZXC ,18-Mbit DDR II+ SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency)Functional Description1100 MHz) at 550 MHz The CY7C1168KV18, and CY7C1170KV18 are 1.8 V Available i ..
CY7C1217F-100AC ,1-Mb (32K x 36) Flow-Through Sync SRAMFeaturesfirst address in a burst and increments the address automati-• 32K x 36 common I/O cally fo ..
D381A , Electroluminescent Lamp Driver IC
D381A , Electroluminescent Lamp Driver IC
D381A , Electroluminescent Lamp Driver IC
D38NH02L , N-channel 24V - 0.011ohm - 38A - DPAK/IPAK STripFET TM III Power MOSFET
D3FJ10 , Schottky Barrier Diode
D3FJ10 , Schottky Barrier Diode


CY7C1163KV18-400BZI-CY7C1165KV18-400BZC-CY7C1165KV18-400BZXC-CY7C1165KV18-550BZXC

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