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CY74FCT573ATSOCTIN/a64avaiOctal Transparent D-Type Latches with 3-State Outputs
CY74FCT573CTSOCCYPRESSN/a50avaiOctal Transparent D-Type Latches with 3-State Outputs


CY74FCT573ATSOC ,Octal Transparent D-Type Latches with 3-State OutputsCY54FCT573T, CY74FCT573T 8-BIT LATCHESWITH 3-STATE OUTPUTSSCCS068 – OCTOBER 2001CY54FCT573T ...D P ..
CY74FCT573CTSOC ,Octal Transparent D-Type Latches with 3-State Outputslogic diagram (positive logic)1OE11LECP19Q O02DD0To Seven Other Channels2POST OFFICE BOX 655303 • D ..
CY74FCT574ATQCT ,Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputslogic diagram (positive logic)1OE11CPC1 19Q O2 01DD0To Seven Other Channels2POST OFFICE BOX 655303 ..
CY74FCT574ATSOC ,Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputsmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
CY74FCT574TQCT ,Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputsmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
CY74FCT574TSOC ,Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs/sc/package.FUNCTION TABLEINPUTSOUTPUTOD CP OEH ↑ L HL ↑ LLX X H ZH = High logic level, L = Low log ..
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CY74FCT573ATSOC-CY74FCT573CTSOC
Octal Transparent D-Type Latches with 3-State Outputs
Significantly Improved Noise
Characteristics
Ioff Supports Partial-Power-Down Mode
Operation
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
Matched Rise and Fall Times Fully Compatible With TTL Input and
Output Logic Levels
3-State Outputs CY54FCT573T
– 32-mA Output Sink Current
– 12-mA Output Source Current
CY74FCT573T
– 64-mA Output Sink Current
– 32-mA Output Source Current
description

The ’FCT573T devices consist of eight latches with 3-state outputs for bus-organized applications. When the
latch-enable (LE) input is high, the flip-flops appear transparent to the data. Data that meets the required setup
times are latched when LE transitions from high to low. Data appears on the bus when the output-enable (OE)
input is low. When OE is high, the bus output is in the high-impedance state. In this mode, data can be entered
into the latches. The ’FCT573T devices are identical to the ’FCT373T devices, except for the flow-through
pinout of the ’FCT573T, which simplifies board design.
These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the
outputs, preventing damaging current backflow through the device when it is powered down.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.35
GND35
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