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CD74HC354ERCAN/a20avaiHigh Speed CMOS Logic 8-Input Multiplexer/Register with 3-State Outputs
CD74HC354EHARN/a11avaiHigh Speed CMOS Logic 8-Input Multiplexer/Register with 3-State Outputs


CD74HC354E ,High Speed CMOS Logic 8-Input Multiplexer/Register with 3-State OutputsFeatures Description• HC/HCT354 The CD54HC354, CD74HC354, and CD74HCT354 are dataselectors/multiple ..
CD74HC354E ,High Speed CMOS Logic 8-Input Multiplexer/Register with 3-State OutputsLogic Diagram15OE116OE2VCC17OE3P18Y1 OF 8 LATCHESENPNE8 (7, 6, 5, 4, 3, 2, 1)GNDED0P PN NEEEVCCP19Y ..
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CD74HC354E
High Speed CMOS Logic 8-Input Multiplexer/Register with 3-State Outputs
Semiconductor CD54HC354, CD74HC354, CD74HCT354 8-Line to 1-Line Data Selector/Multiplexer/Register With 3-State Outputs SCHS277D - November 1997 - Revised May 2003 Features Description • HC/HCT354 The CD54HC354, CD74HC354, and CD74HCT354 are data selectors/multiplexers that select one of eight sources. In both - Transparent Data and Select Latches [ /Title types, the data select bits S0, S1 and S2 are stored in • Buffered Inputs transparent latches that are enabled by a low latch enable (CD74 • Three-State Complementary Outputs input, LE. HC354 • Bus Line Driving Capability E, controls , In the HC/HCT354 the data enable input, • Typical Propagation Delay: V = 5V, C = 15pF, CC L transparent latches that pass data to the outputs when Eis o CD74 T = 25 C A high and latches in new data when E is low. - Data to Output = 18ns HCT35 In both types the three-state outputs are controlled by three • Fanout (Over Temperature Range) 4) output-enable inputs OE1, OE2, and OE3. - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads /Sub- - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads Ordering Information ject o o • Wide Operating Temperature Range . . . -55 C to 125 C (High TEMP. RANGE • Balanced Propagation Delay and Transition Times o PART NUMBER ( C) PACKAGE Speed • Significant Power Reduction Compared to LSTTL CMOS CD54HC354F3A -55 TO 125 20 Ld CERDIP Logic ICs Logic CD74HC354E -55 to 125 20 Ld PDIP • HC Types 8-Input - 2V to 6V Operation CD74HCT354E -55 to 125 20 Ld PDIP Multip - High Noise Immunity: N = 30%, N = 30% of V IL IH CC at V = 5V lexer/ CC • HCT Types Regis- - 4.5V to 5.5V Operation - Direct LSTTL Input Logic Compatibility, V = 0.8V (Max), V = 2V (Min) IL IH - CMOS Input Compatibility, I ≤ 1μA at V , V l OL OH Pinout CD54HC354 (CERDIP) CD74HC354, CD74HCT354 (PDIP) TOP VIEW D7 1 20 V CC D6 2 Y 19 D5 3 18 Y D4 4 17 OE3 D3 5 16 OE2 D2 6 15 OE1 D1 7 14 S0 D0 8 13 S1 E 9 12 S2 GND 10 11 LE CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. Copyright © 2003, 1
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