CD74ACT08M96 ,Quad 2-Input AND Gatesmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
CD74ACT08M96G4 ,Quad 2-Input AND Gates 14-SOIC -55 to 125CD54ACT08, CD74ACT08 QUADRUPLE 2-INPUT POSITIVE-AND GATES SCHS312B – JANUARY 2001 – REVISED JUNE 20 ..
CD74ACT109E ,Dual Positive-Edge Triggered J-K Flip-Flops with Set and Resetelectrical characteristics over recommended operating free-air temperature range (unlessotherwise n ..
CD74ACT109E ,Dual Positive-Edge Triggered J-K Flip-Flops with Set and Reset/sc/package.FUNCTION TABLE(each flip-flop)INPUTS OUTPUTSPRE CLR CLK J K Q QL H X X X H LH LX X X L ..
CD74ACT109E ,Dual Positive-Edge Triggered J-K Flip-Flops with Set and Resetmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
CD74ACT109M ,Dual Positive-Edge Triggered J-K Flip-Flops with Set and Resetmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
CIH10T6N8JNC , Chip Inductor; CIH Series
CIH10T6N8JNC , Chip Inductor; CIH Series
CIL10NR10KNC , It has ferrite and 100% Ag as internal conductors, the CIL Series has excellent Q characteristics and eliminate crosstalk.
CIL10NR10KNC , It has ferrite and 100% Ag as internal conductors, the CIL Series has excellent Q characteristics and eliminate crosstalk.
CIL10Y100KNC , It has ferrite and 100% Ag as internal conductors, the CIL Series has excellent Q characteristics and eliminate crosstalk.
CIL10Y100KNC , It has ferrite and 100% Ag as internal conductors, the CIL Series has excellent Q characteristics and eliminate crosstalk.
CD74ACT08E-CD74ACT08M-CD74ACT08M96-CD74ACT08M96G4
Quad 2-Input AND Gates
Buffered Inputs ±24-mA Output Drive Current
– Fanout to 15 F Devices SCR-Latchup-Resistant CMOS Process and
Circuit Design Exceeds 2-kV ESD Protection Per
MIL-STD-883, Method 3015
descriptionThe ’ACT08 devices are quadruple 2-input positive-AND gates. These devices perform the Boolean function- A• BorY- A- B in positive logic.
ORDERING INFORMATION Package drawings, standard packing quantities, thermal data, symbolization, and PCB design
guidelines are available at www.ti.com/sc/package.
FUNCTION TABLE
(each gate)
logic diagram, each gate (positive logic) YGND
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
