CD54HCT132F ,CMOS 8-Input NAND/AND GateFeatures Description• Unlimited Input Rise and Fall Times The ’HC132 and ’HCT132 each contain four ..
CD54HCT138F ,High Speed CMOS Logic Inverting and Non-Inverting 3-to-8 Line Decoder DemultiplexerMaximum Ratings Thermal InformationDC Supply Voltage, V . . . . . . . . . . . . . . . . . . . . . . ..
CD54HCT138F3A ,High Speed CMOS Logic Inverting and Non-Inverting 3-to-8 Line Decoder DemultiplexerMaximum Ratings Thermal InformationDC Supply Voltage, V . . . . . . . . . . . . . . . . . . . . . . ..
CD54HCT139F ,High Speed CMOS Logic Dual 2-to-4 Line Decoder/DemultiplexersLogic Diagram4 (12)Y02 (14)A05 (11)Y13 (13)A16 (10)Y27 (9)1 (15)Y3E2CD54HC139, CD74HC139, CD54HCT13 ..
CD54HCT139F3A ,High Speed CMOS Logic Dual 2-to-4 Line Decoder/DemultiplexersMaximum Ratings Thermal InformationoDC Supply Voltage, V . . . . . . . . . . . . . . . . . . . . . ..
CD54HCT139F3A ,High Speed CMOS Logic Dual 2-to-4 Line Decoder/DemultiplexersCD54HC139, CD74HC139,CD54HCT139, CD74HCT139Data sheet acquired from Harris SemiconductorSCHS148DHig ..
CHPZ27VPT , SILICON PLANAR POWER ZENER DIODES
CHPZ6V2PT , SILICON PLANAR POWER ZENER DIODES
CHS-01TA , SURFACE MOUNT TYPE SLIDE SWITCHES
CHS-01TA1 , SURFACE MOUNT TYPE SLIDE SWITCHES
CHS-02TB , SURFACE MOUNT TYPE SLIDE SWITCHES
CHS-04MB , SURFACE MOUNT TYPE SLIDE SWITCHES
CD54HCT132F
CMOS 8-Input NAND/AND Gate
CD54HC132, CD74HC132, CD54HCT132, CD74HCT132 SCHS145E High-Speed CMOS Logic Quad 2-Input NAND Schmitt Trigger August 1997 - Revised March 2004 Features Description • Unlimited Input Rise and Fall Times The ’HC132 and ’HCT132 each contain four 2-input NAND Schmitt Triggers in one package. This logic device utilizes • Exceptionally High Noise Immunity [ /Title silicon gate CMOS technology to achieve operating speeds (CD74 similar to LSTTL gates with the low power consumption of = 5V, • Typical Propagation Delay: 10ns at V CC o standard CMOS integrated circuits. All devices have the C = 15pF, T = 25 C HC132 L A ability to drive 10 LSTTL loads. The HCT logic family is , • Fanout (Over Temperature Range) functionally pin compatible with the standard LS logic family. D74 - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads C - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads HCT13 Ordering Information o o 2) • Wide Operating Temperature Range . . . -55 C to 125 C TEMP. RANGE /Sub- o PART NUMBER ( C) PACKAGE • Balanced Propagation Delay and Transition Times ject CD54HC132F3A -55 to 125 14 Ld CERDIP • Significant Power Reduction Compared to LSTTL (High Logic ICs CD54HCT132F3A -55 to 125 14 Ld CERDIP Speed • HC Types CMOS CD74HC132E -55 to 125 14 Ld PDIP - 2V to 6V Operation Logic - High Noise Immunity: N = 37%, N = 51% of V CD74HC132M -55 to 125 14 Ld SOIC IL IH CC Quad at V = 5V CC CD74HC132MT -55 to 125 14 Ld SOIC 2-Input • HCT Types NAND CD74HC132M96 -55 to 125 14 Ld SOIC - 4.5V to 5.5V Operation Schmit - Direct LSTTL Input Logic Compatibility, CD74HCT132E -55 to 125 14 Ld PDIP V = 0.8V (Max), V = 2V (Min) IL IH CD74HCT132M -55 to 125 14 Ld SOIC - CMOS Input Compatibility, I ≤ 1µA at V , V l OL OH CD74HCT132MT -55 to 125 14 Ld SOIC CD74HCT132M96 -55 to 125 14 Ld SOIC NOTE: When ordering, use the entire part number. The suffix 96 denotes tape and reel. The suffix T denotes a small-quantity reel of 250. Pinout CD54HC132, CD54HCT132 (CERDIP) CD74HC132, CD74HCT132 (PDIP, SOIC) TOP VIEW 1A 1 14 V CC 1B 2 13 4B 1Y 3 12 4A 2A 4 11 4Y 2B 5 10 3B 2Y 6 9 3A GND 7 8 3Y CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. Copyright © 2004, 1
