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CD54HC4075F3ATIN/a1avaiHigh Speed CMOS Logic Triple 3-Input OR Gates
5962-8772201CA |59628772201CAHARRISN/a52avaiHigh Speed CMOS Logic Triple 3-Input OR Gates
5962-8772201CA |59628772201CATIN/a1avaiHigh Speed CMOS Logic Triple 3-Input OR Gates


5962-8772201CA ,High Speed CMOS Logic Triple 3-Input OR GatesLogic DiagramnAnB nYnC3CD54HC4075, CD74HC4075, CD54HCT4075, CD74HCT4075Absolute
5962-8772201CA ,High Speed CMOS Logic Triple 3-Input OR GatesMaximum Ratings Thermal InformationDC Supply Voltage, V . . . . . . . . . . . . . . . . . . . . . . ..
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5962-8772201CA-CD54HC4075F3A
High Speed CMOS Logic Triple 3-Input OR Gates 20-LCCC -55 to 125
CD54HC4075, CD74HC4075, CD54HCT4075, CD74HCT4075 SCHS210G High-Speed CMOS Logic August 1997 - Revised June 2006 Triple 3-Input OR Gate Features Description • Buffered Inputs The ’HC4075 and ’HCT4075 logic gates utilize silicon-gate CMOS technology to achieve operating speeds similar to = 5V, • Typical Propagation Delay: 8ns at V [ /Title CC LSTTL gates with the low power consumption of standard o C = 15pF, T = 25 C L A (CD74H CMOS integrated circuits. All devices have the ability to drive 10 LSTTL loads. The HCT logic family is functionally pin • Fanout (Over Temperature Range) C4075, compatible with the standard LS logic family. - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads CD74H - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads CT4075) Ordering Information o o • Wide Operating Temperature Range . . . -55 C to 125 C /Subject TEMP. RANGE (High • Balanced Propagation Delay and Transition Times o PART NUMBER ( C) PACKAGE Speed • Significant Power Reduction Compared to LSTTL CD54HC4075F3A -55 to 125 14 Ld CERDIP CMOS Logic ICs Logic CD54HC4075FK -55 to 125 20 LCCC • HC Types Triple 3- - 2V to 6V Operation CD54HCT4075F3A -55 to 125 14 Ld CERDIP Input - High Noise Immunity: N = 30%, N = 30% of V IL IH CC CD74HC4075E -55 to 125 14 Ld PDIP at V = 5V CC CD74HC4075M -55 to 125 14 Ld SOIC • HCT Types - 4.5V to 5.5V Operation CD74HC4075MT -55 to 125 14 Ld SOIC - Direct LSTTL Input Logic Compatibility, CD74HC4075M96 -55 to 125 14 Ld SOIC V = 0.8V (Max), V = 2V (Min) IL IH - CMOS Input Compatibility, I ≤ 1µA at V , V CD74HC4075NSR -55 to 125 14 Ld SOP l OL OH CD74HC4075PW -55 to 125 14 Ld TSSOP CD74HC4075PWR -55 to 125 14 Ld TSSOP CD74HC4075PWT -55 to 125 14 Ld TSSOP CD74HCT4075E -55 to 125 14 Ld PDIP NOTE: When ordering, use the entire part number. The suffixes 96 and R denote tape and reel. The suffix T denotes a small-quantity reel of 250. CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. Copyright © 2006, 1
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