CD54HC139F ,High Speed CMOS Logic Dual 2-to-4 Line Decoder/DemultiplexersLogic Diagram4 (12)Y02 (14)A05 (11)Y13 (13)A16 (10)Y27 (9)1 (15)Y3E2CD54HC139, CD74HC139, CD54HCT13 ..
CD54HC139F3A ,High Speed CMOS Logic Dual 2-to-4 Line Decoder/DemultiplexersMaximum Ratings Thermal InformationoDC Supply Voltage, V . . . . . . . . . . . . . . . . . . . . . ..
CD54HC147F3A ,High Speed CMOS Logic 10-to-4 Line Priority EncoderMaximum Ratings Thermal InformationDC Supply Voltage, V . . . . . . . . . . . . . . . . . . . . . . ..
CD54HC147F3A ,High Speed CMOS Logic 10-to-4 Line Priority EncoderCD54HC147, CD74HC147,CD74HCT147Data sheet acquired from Harris SemiconductorSCHS149FHigh-Speed CMOS ..
CD54HC14F ,High Speed CMOS Logic Hex Inverting Schmitt TriggerMaximum Ratings Thermal InformationoDC Supply Voltage, V . . . . . . . . . . . . . . . . . . . . . ..
CD54HC14F3A ,High Speed CMOS Logic Hex Inverting Schmitt TriggerMaximum Ratings Thermal InformationoDC Supply Voltage, V . . . . . . . . . . . . . . . . . . . . . ..
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CH8398A , TRUE-COLOR CHRONDAC WITH 16-BIT INTERFACE
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CD54HC139F-CD54HC139F3A
High Speed CMOS Logic Dual 2-to-4 Line Decoder/Demultiplexers
CD54HC139, CD74HC139, CD54HCT139, CD74HCT139 SCHS148D High-Speed CMOS Logic Dual 2- to 4-Line Decoder/Demultiplexer September 1997 - Revised October 2003 Features Description • Multifunction Capability The ’HC139 and ’HCT139 devices contain two independent - Binary to 1 of 4 Decoders or 1 to 4 Line binary to one of four decoders each with a single active low [ /Title Demultiplexer enable input (1E or 2E). Data on the select inputs (1A0 and (CD74 1A1 or 2A0 and 2A1) cause one of the four normally high • Active Low Mutually Exclusive Outputs outputs to go low. HC139 • Fanout (Over Temperature Range) , If the enable input is high all four outputs remain high. For - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads demultiplexer operation the enable input is the data input. D74 C - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads The enable input also functions as a chip select when these HCT13 devices are cascaded. This device is functionally the same o o • Wide Operating Temperature Range . . . -55 C to 125 C 9) as the CD4556B and is pin compatible with it. • Balanced Propagation Delay and Transition Times /Sub- The outputs of these devices can drive 10 low power ject • Significant Power Reduction Compared to LSTTL Schottky TTL equivalent loads. The HCT logic family is Logic ICs functionally as well as pin equivalent to the LS logic family. (High Speed • HC Types Ordering Information CMOS - 2V to 6V Operation - High Noise Immunity: N = 30%, N = 30%of V at Logic IL IH CC TEMP. RANGE o V = 5V PART NUMBER ( C) PACKAGE CC Dual 2-to-4 • HCT Types CD54HC139F3A -55 to 125 16 Ld CERDIP - 4.5V to 5.5V Operation Line CD54HCT139F3A -55 to 125 16 Ld CERDIP - Direct LSTTL Input Logic Compatibility, Decod V = 0.8V (Max), V = 2V (Min) CD74HC139E -55 to 125 16 Ld PDIP IL IH - CMOS Input Compatibility, I ≤ 1µA at V , V l OL OH CD74HC139M -55 to 125 16 Ld SOIC • Memory Decoding, Data Routing, Code Conversion CD74HC139MT -55 to 125 16 Ld SOIC CD74HC139M96 -55 to 125 16 Ld SOIC CD74HCT139E -55 to 125 16 Ld PDIP CD74HCT139M -55 to 125 16 Ld SOIC CD74HCT139MT -55 to 125 16 Ld SOIC Pinout CD74HCT139M96 -55 to 125 16 Ld SOIC CD54HC139, CD54HCT139 (CERDIP) NOTE: When ordering, use the entire part number. The suffix 96 CD74HC139, CD74HCT139 denotes tape and reel. The suffix T denotes a small-quantity reel of (PDIP, SOIC) 250. TOP VIEW 1E 1 16 V CC 1A0 2 15 2E 1A1 3 14 2A0 1Y0 4 13 2A1 1Y1 5 12 2Y0 1Y2 6 11 2Y1 1Y3 7 10 2Y2 GND 8 9 2Y3 CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. Copyright © 2003, 1
