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CBT3125DNXPN/a595avaiQuadruple FET bus switch
CBT3125PWNXPN/a50000avaiQuadruple FET bus switch


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CBT3125D-CBT3125PW
Quadruple FET bus switch
Product data
File under Integrated Circuits — ICL03
2001 Dec 12
Philips Semiconductors Product data
CBT3125Quadruple FET bus switch
DESCRIPTION

The CBT3125 quadruple FET bus switch features independent line
switches. Each switch is disabled when the associated Output
Enable (OE) input is HIGH.
FEATURES
Standard ’125-type pinout (D, DB, and PW packages) 5 Ω switch connection between two ports TTL-compatible input levels Latch-up testing is done to JESDEC Standard JESD78 which
exceeds 500 mA ESD protection exceeds 2000 V HBM per JESD22-A114,
200 V MM per JESD22-A115, and 1000 V CDM per
JESD22-C101
PIN CONFIGURATION
Figure 1. SO14, SSOP14, and TSSOP14

NC = no internal connection
Figure 2. SSOP(QSOP)16
ORDERING INFORMATION

Standard packing quantities and other packaging data is available at www.philipslogic.com/packaging.
Philips Semiconductors Product data
CBT3125Quadruple FET bus switch
LOGIC DIAGRAM

Pin numbers shown are for 14-pin package-types.
Figure 3. CBT3125 logic diagram (positive logic)
FUNCTION TABLE (each bus switch)
ABSOLUTE MAXIMUM RATINGS1

Over operating free-air temperature range, unless otherwise noted.
NOTES:
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only,
and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions”
is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. The package thermal impedance is calculated in accordance with JESD 51-7.
RECOMMENDED OPERATING CONDITIONS1
NOTE:
All unused control inputs of the device must be held at VCC or GND to ensure proper device operation.
Philips Semiconductors Product data
CBT3125Quadruple FET bus switch
DC ELECTRICAL CHARACTERISTICS

Over recommended operating free-air temperature range, unless otherwise noted.
NOTES:
All typical values are at VCC = 5 V, unless otherwise noted. Tamb = 25 °C. This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND. Measured by the voltage drop between the A and the B terminals at the indicated current through the switch. On-state resistance is
determined by the lower of the voltages of the two (A or B) terminals.
AC CHARACTERISTICS

Tamb = –40 to +85 °C; CL = 50 pF, unless otherwise noted.
NOTE:
This parameter is warranted but not production tested. The propagation delay is based on the RC time constant of the typical on-state
resistance of the switch and a load capacitance of 50 pF, when driven by an ideal voltage source (zero output impedance).
Philips Semiconductors Product data
CBT3125Quadruple FET bus switch
AC WAVEFORMS

VM = 1.5 V, VIN = GND to 3.0V
tPLH and tPHL are the same as tpd.
Waveform 1. Input to Output Propagation Delays

tPLZ and tPHZ are the same as tdis.
tPZL and tPZH are the same as ten.
Waveform 2. Output Enable and Disable Times
TEST CIRCUIT

tPLZ and tPHZ are the same as tdis.
tPZL and tPZH are the same as ten.
NOTES:
All input pulses are supplied by generators having the following
characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns,
tf ≤ 2.5 ns. The outputs are measured one at a time with one transition per
measurement.
Philips Semiconductors Product data
CBT3125Quadruple FET bus switch
SO14: plastic small outline package; 14 leads; body width 3.9 mm SOT108-1
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