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BUK9230-55A
TrenchMOS(tm) logic level FET
BUK9230-55A renchMOS™ logic level FET
Rev. 03 — 30 January 2001 Product specificationM3D300
DescriptionN-channel enhancement mode field-effect power transistorina plastic package using
TrenchMOS™1 technology, featuring very low on-state resistance.
Product availability:
BUK9230-55A in SOT428 (D-PAK).
Features TrenchMOS™ technology Q101 compliant 175 °C rated Logic level compatible.
Applications Automotive and general purpose power switching: 12 V and 24 V loads Motors, lamps and solenoids.
Pinning information TrenchMOS is a trademark of Royal Philips Electronics.
Table 1: Pinning - SOT428 (D-PAK), simplified outline and symbol gate (g)
SOT428 (D-PAK) drain (d) source (s) mounting base;
connected to
drain(d)
MBK091Top view
MBB076
Philips Semiconductors BUK9230-55A
TrenchMOS™ logic level FET Quick reference data Limiting values[1] IDM is limited by chip, not package.
Table 2: Quick reference dataVDS drain-source voltage (DC) − 55 V drain current (DC) Tmb =25 °C; VGS =5V − 38 A
Ptot total power dissipation Tmb =25°C − 88 W junction temperature − 175 °C
RDSon drain-source on-state resistance Tj =25 °C; VGS =5V; ID =15A 26 30 mΩ =25 °C; VGS= 4.5 V; ID =15A − 33 mΩ
Table 3: Limiting valuesIn accordance with the Absolute Maximum Rating System (IEC 60134).
VDS drain-source voltage (DC) − 55 V
VDGR drain-gate voltage (DC) RGS =20kΩ− 55 V
VGS gate-source voltage (DC) −±10 V
VGSM non-repetitive gate-source voltage tp≤50μs −±15 V drain current (DC) Tmb =25 °C; VGS =5V;
Figure2 and3 38 A
Tmb= 100 °C; VGS =5V; Figure2 − 27 A
IDM peak drain current Tmb =25 °C; pulsed; tp≤10 μs;
Figure3
[1]− 154 A
Ptot total power dissipation Tmb =25 °C; Figure1 − 88 W
Tstg storage temperature −55 +175 °C operating junction temperature −55 +175 °C
Source-drain diodeIDR reverse drain current (DC) Tmb =25°C − 38 A
IDRM pulsed reverse drain current Tmb =25 °C; pulsed; tp≤10μs − 154 A
Avalanche ruggednessWDSS non-repetitive avalanche energy unclamped inductive load; ID =34A;
VDS≤55 V; VGS =5V; RGS =50Ω;
starting Tj =25°C 57.8 mJ
Philips Semiconductors BUK9230-55A
TrenchMOS™ logic level FET
Philips Semiconductors BUK9230-55A
TrenchMOS™ logic level FET Thermal characteristics
7.1 Transient thermal impedance
Table 4: Thermal characteristicsRth(j-a) thermal resistance from junction to ambient Figure4 71.4 K/W
Rth(j-mb) thermal resistance from junction to mounting
base
1.7 K/W
Philips Semiconductors BUK9230-55A
TrenchMOS™ logic level FET Characteristics
Table 5: Characteristics =25 °C unless otherwise specified
Static characteristicsV(BR)DSS drain-source breakdown
voltage= 0.25 mA; VGS =0V =25 °C55 −− V= −55 °C50 −− V
VGS(th) gate-source threshold voltageID=1 mA; VDS =VGS;
Figure9 =25°C 1 1.5 2 V= 175°C 0.5 −− V= −55°C −− 2.3 V
IDSS drain-source leakage current VDS=55 V; VGS =0V =25°C − 0.05 10 μA= 175°C −− 500 μA
IGSS gate-source leakage current VGS= ±10 V; VDS =0V − 2 100 nA
RDSon drain-source on-state
resistance
VGS =5V; ID =15A;
Figure7 and8 =25°C − 26 30 mΩ= 175°C −− 60 mΩ
VGS= 4.5 V; ID =15A −− 33 mΩ
VGS =10V; ID =15A − 23 27 mΩ
Dynamic characteristicsCiss input capacitance VGS =0V; VDS =25V;=1 MHz; Figure12 1294 1725 pF
Coss output capacitance − 210 252 pF
Crss reverse transfer capacitance − 142 195 pF
td(on) turn-on delay time VDD=30 V; RL= 1.2Ω;
VGS =5V; RG =10Ω; 14 − ns rise time − 125 − ns
td(off) turn-off delay time − 64 − ns fall time − 68 − ns internal drain inductance measured from drain lead
from package to centre of
die 2.5 − nH internal source inductance measured from source lead
from package to source
bond pad 7.5 − nH
Philips Semiconductors BUK9230-55A
TrenchMOS™ logic level FET
Source-drain diodeVSD source-drain (diode forward)
voltage=25 A; VGS =0V;
Figure15 0.85 1.2 V
trr reverse recovery time IS =20A; dIS/dt= −100 A/μs
VGS= −10 V; VDS =30V 35 − ns recovered charge − 70 − nC
Table 5: Characteristics…continued =25 °C unless otherwise specified
Philips Semiconductors BUK9230-55A
TrenchMOS™ logic level FET
