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BTS7810KInfineonN/a290avaiSmart Motorbridges + Driver ICs


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BTS7810K
Smart Motorbridges + Driver ICs

TrilithIC
Data Sheet
BTS7810K
1Overview
1.1Features
Quad D-MOS switch Free configurable as bridge or quad-switchOptimized for DC motor management applications
Low RDSON: 26mΩ high-side switch, 14mΩ low-side
switch (typical values @25°C) Maximum peak current: typ. 42 A @ 25°C=Very low quiescent current: typ. 4 µA @ 25 °C=Small outline, thermal optimized PowerPak Load and GND-short-circuit-protectionOperates up to 40 VStatus flag for over temperatureOpen load detection in Off-modeOvertemperature shut down with hysteresisInternal clamp diodesIsolated sources for external current sensingUnder-voltage detection with hysteresis

1.2Description

The BTS7810K is part of the TrilithIC family containing three dies in one package:
One double high-side switch and two low-side switches. The drains of these three
vertical DMOS chips are mounted on separated leadframes. The sources are connected
to individual pins, so the BTS7810K can be used in H-bridge- as well as in any other
configuration. The double high-side is manufactured in SMART SIPMOS® technology
which combines low RDSON vertical DMOS power stages with CMOS control circuit. The
high-side switch is fully protected and contains the control and diagnosis circuit. To
achieve low RDSON and fast switching performance, the low-side switches aremanufactured in S-FET 2 logic level technology. The equivalent standard product is the
SPD30N06S2L-13.
1.3Pin Configuration
(top view)

Figure 1
Pins written in bold type need power wiring.
1.4Pin Definitions and Functions
1.5Functional Block Diagram
Figure 2
Block Diagram
1.6Circuit Description
Input Circuit

The control inputs IH1,2 consist of TTL/CMOS compatible Schmitt-Triggers with
hysteresis. Buffer amplifiers are driven by these stages and convert the logic signal into
the necessary form for driving the power output stages. The inputs are protected by ESD
clamp-diodes.
The inputs IL1 and IL2 are connected to the gates of the standard N-channel vertical
power-MOS-FETs.
Output Stages

The output stages consist of a low RDSON Power-MOS H-bridge. In H-bridge
configuration, the D-MOS body diodes can be used for freewheeling when commutating
inductive loads. If the high-side switches are used as single switches, positive and
negative voltage spikes which occur when driving inductive loads are limited by
integrated power clamp diodes.
Short Circuit Protection

The outputs are protected againstoutput short circuit to groundoverload (load short circuit).
An internal OP-amp controls the Drain-Source-voltage by comparing the DS-voltage-
drop with an internal reference voltage. Above this trippoint the OP-Amp reduces the
output current depending on the junction temperature and the drop voltage.
In the case of overloaded high-side switches the status output is set to low.
Overtemperature Protection

The high-side switches incorporate an overtemperature protection circuit with hysteresis
which switches off the output transistors and sets the status output to low.
Undervoltage-Lockout (UVLO)

When VS reaches the switch-on voltage VUVON the IC becomes active with a hysteresis.
The high-side output transistors are switched off if the supply voltage VS drops below the
switch off value VUVOFF.
Open Load Detection

Open load is detected by voltage measurement in off state. If the output voltage exceeds
Status Flag
The two status flag outputs are an open drain output with Zener-diode which require a
pull-up resistor, c.f. the application circuit on page15. ST1 and ST2 provide separate
diagnosis for each high-side switch. Various errors as listed in the table “Diagnosis” are
detected by switching the open drain output ST1/2 to low. Forward current in the
integrated body diode of the highside switch may cause undefined voltage levels at the
corresponding status output. The open load detection can be used to detect a short to
Vs as long as both lowside switches are off and ROL is disconnected from 5V by
BCR192W.
Truthtable and Diagnosis (valid only for the High-Side-Switches)
Note:* multiple simultaneous errors are not shown in this table
Inputs:Outputs:Status:
0 = Logic LOWZ = Output in tristate condition1 = No error
1 = Logic HIGHL = Output in sink condition0 = Error
X = don’t careH = Output in source condition
X = Voltage level undefined
Electrical Characteristics3.1Absolute Maximum Ratings
– 40 °C < Tj < 150 °C
High-Side-Switches (Pins DHVS, IH1,2 and SH1,2)

Note:* internally limited
Status Output ST (Pins ST1 and ST2)
Low-Side-Switches (Pins DL1,2, IL1,2 and SL1,2)
Temperatures
Note:Maximum ratings are absolute ratings; exceeding any one of these values may
cause irreversible damage to the integrated circuit.
Note:In the operating range the functions given in the circuit description are fulfilled.
Thermal Resistances (one HS-LS-Path active)
ESD Protection (Human Body Model acc. MIL STD 883D, method 3015.7 and EOS/

ESD assn. standard S5.1 - 1993)
3.2Operating Range

– 40 °C < Tj < 150 °C
3.1Absolute Maximum Ratings (cont’d)

– 40 °C < Tj < 150 °C
3.3Electrical Characteristics
ISH1 = ISH2 = ISL1 = ISL2 = 0 A; – 40 °C < Tj < 150 °C; 8 V < VS < 18 V
unless otherwise specified
Current Consumption HS-switch
Current Consumption LS-switch
Under Voltage Lockout (UVLO) HS-switch
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