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|ATF22V10CQZ-20XC 40pcs , TSSOP-24P , Alternate PN:ATF22V10CQZ20XC,Highperformance EE PLD|
Block DiagramATF22V10CZATF22V10CQZDescriptionThe ATF22V10CZ/CQZ is a high-performance CMOS (electrically-erasable)programmable logic device (PLD) which utilizes Atmel’s proven electrically-erasable(continued)Pin ConfigurationsTSSOPAll Pinouts Top ViewCLK/IN 1 24 VCCPin Name FunctionIN 2 23 I/OIN 3 22 I/OCLK ClockIN 4 21 I/OIN 5 20 I/OIN Logic InputsIN 6 19 I/OIN 7 18 I/OI/O Bi-directional BuffersIN 8 17 I/OIN 9 16 I/OVCC +5V SupplyIN 1015 I/OIN 11 14 I/OPLCCGND 12 13 INDIP/SOICIN 5 25 I/OIN 6 24 I/OCLK/IN 1 24 VCCIN 7 23 I/OIN 2 23 I/OGND* 8 22 GND*IN 3 22 I/OIN 9 21 I/OIN 4 21 I/OIN 10 20 I/OIN 5 20 I/OIN 11 19 I/OIN 6 19 I/OIN 7 18 I/OIN 8 17 I/OIN 9 16 I/ORev. 0778H–03/01IN 10 15 I/ONote: For PLCC, P1, P8, P15 and P22 can be left IN 11 14 I/OGND 12 13 INunconnected. For superior performance, con-nect VCC to pin 1 and GND to 8, 15, and 22.1IN 12 4 ININ 13 3 INGND 14 2 CLK/INGND* 15 1 VCC*IN 16 28 VCCI/O 17 27 I/OI/O 18 26 I/OFlash memory technology. Speeds down to 12 ns with zero meet specific application requirements and enhance reli-standby power dissipation are offered. All speed ranges ability. Pin “keeper” circuits on input and output pins elimi-are specified over the full 5V ±10% range for industrial tem- nate static power consumed by pull-up resistors. Theperature ranges; 5V ±5% for commercial range 5-volt “CQZ” combines the low high-frequency I of the “Q”CCdevices. The ATF22V10CZ/CQZ provides a low voltage design with the “Z” feature.and edge-sensing “zero” power CMOS PLD solution withThe ATF22V10CZ/CQZ incorporates a superset of the“zero” standby power (5 µA typical). Thegeneric architectures, which allows direct replacement ofATF22V10CZ/CQZ provides a “zero” power CMOS PLDthe 22V10 family and most 24-pin combinatorial PLDs. Tensolution with 5V operating voltages, powering down auto-outputs are each allocated 8 to 16 product terms. Threematically to the zero power-mode through Atmel’s patenteddifferent modes of operation, configured automaticallyInput Transition Detection (ITD) circuitry when the device iswith software, allow highly complex logic functions to beidle, offering “zero” (25 µA worst case) standby power. Thisrealized.feature allows the user to manage total system power toAbsolute Maximum Ratings**NOTICE: Stresses beyond those listed under “Absolute Temperature Under Bias.................................. -40°C to +85°CMaximum Ratings” may cause permanent dam-age to the device. This is a stress rating only and Storage Temperature..................................... -65°C to +150°Cfunctional operation of the device at these or any Voltage on Any Pin with other conditions beyond those indicated in the (1)Respect to Ground .........................................-2.0V to +7.0V operational sections of this specification is not implied. Exposure to absolute maximum rating Voltage on Input Pins conditions for extended periods may affect device with Respect to Ground reliability.(1)During Programming.....................................-2.0V to +14.0VNote: 1. Minimum voltage is -0.6V DC, which may under-shoot to -2.0V for pulses of less than 20 ns. Max-Programming Voltage with imum output pin voltage is V + 0.75V DC, CC(1)Respect to Ground .......................................-2.0V to +14.0Vwhich may overshoot to 7.0V for pulses of less than 20 ns.DC and AC Operating ConditionsCommercial IndustrialOperating Temperature (Ambient) 0°C - 70°C-40°C - 85°CV Power Supply 5V ± 5% 5V ± 10%CCCompiler Mode SelectionPAL Mode GAL Mode(5828 Fuses) (5892 Fuses)Synario ATF22V10C (DIP) ATF22V10C DIP (UES)ATF22V10C (PLCC) ATF22V10C PLCC (UES)WINCUPL P22V10 G22V10P22V10LCC G22V10LCC2 ATF22V10C(Q)ZATF22V10C(Q)ZFunctional Logic Diagram DescriptionThe Functional Logic Diagram describes the Unused product terms are automatically disabled by theATF22V10CZ/CQZ architecture. compiler to decrease power consumption. A security fuse,when programmed, protects the contents of theThe ATF22V10CZ/CQZ has 12 inputs and 10 I/O macro-ATF22V10CZ/CQZ. Eight bytes (64 fuses) of User Signa-cells. Each macrocell can be configured into one of fourture are accessible to the user for purposes such as storingoutput configurations: active high/low, registered/combina-project name, part number, revision or date. The User Sig-torial output.The universal architecture of thenature is accessible regardless of the state of the securityATF22V10CZ/CQZ can be programmed to emulate mostfuse.24-pin PAL devices.DC
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