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ADP3418JRADN/a10200avaiDual Boostrapped 12 V MOSFET Driver with Output Disable
ADP3418JR. |ADP3418JRAD N/a3avaiDual Boostrapped 12 V MOSFET Driver with Output Disable
ADP3418JR-REEL |ADP3418JRREELADIN/a1202avaiDual Boostrapped 12 V MOSFET Driver with Output Disable
ADP3418JR-REEL7 |ADP3418JRREEL7ADN/a17avaiDual Boostrapped 12 V MOSFET Driver with Output Disable
ADP3418JRZADN/a24avaiDual Boostrapped 12 V MOSFET Driver with Output Disable
ADP3418JRZ-REEL |ADP3418JRZREELANALOGN/a127avaiDual Boostrapped 12 V MOSFET Driver with Output Disable
ADP3418KRZADIN/a1194avaiDual Boostrapped 12 V MOSFET Driver with Output Disable
ADP3418KRZ-REEL |ADP3418KRZREELADN/a9793avaiDual Boostrapped 12 V MOSFET Driver with Output Disable


ADP3418JR ,Dual Boostrapped 12 V MOSFET Driver with Output DisableAPPLICATIONS protection to prevent shoot-through current in the external Multiphase desktop CPU sup ..
ADP3418JR. ,Dual Boostrapped 12 V MOSFET Driver with Output DisableSpecifications subject to change without notice. No license is granted by implication www.analog.c ..
ADP3418JR-REEL ,Dual Boostrapped 12 V MOSFET Driver with Output DisableSpecifications subject to change without notice. No license is granted by implication www.analog.c ..
ADP3418JR-REEL7 ,Dual Boostrapped 12 V MOSFET Driver with Output DisableGENERAL DESCRIPTION All-in-one synchronous buck driver The ADP3418 is a dual, high voltage MOSFET d ..
ADP3418JRZ ,Dual Boostrapped 12 V MOSFET Driver with Output DisableGeneral Description .....1 Change to Figure 13 ......8 Change to Ordering Guide..12 3/03—Revision 0 ..
ADP3418JRZ-REEL ,Dual Boostrapped 12 V MOSFET Driver with Output DisableSpecifications.... 3 Overlap Protection Circuit.....9 Absolute Maximum Ratings...... 4 Application ..
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ADP3418JR-ADP3418JR.-ADP3418JR-REEL-ADP3418JR-REEL7-ADP3418JRZ-ADP3418JRZ-REEL-ADP3418KRZ-ADP3418KRZ-REEL
Dual Boostrapped 12 V MOSFET Driver with Output Disable
Dual Bootstrapped 12 V MOSFET
Driver with Output Disable

Rev. B
FEATURES
All-in-one synchronous buck driver
Bootstrapped high-side drive
1 PWM signal generates both drives
Anticross-conduction protection circuitry
Output disable control turns off both MOSFETs to float the
output per Intel® VRM 10 and AMD Opteron specifications
APPLICATIONS
Multiphase desktop CPU supplies
Single-supply synchronous buck converters
GENERAL DESCRIPTION

The ADP3418 is a dual, high voltage MOSFET driver optimized
for driving two N-channel MOSFETs, the two switches in a
nonisolated, synchronous, buck power converter. Each of the
drivers is capable of driving a 3000 pF load with a 30 ns transition
time. One of the drivers can be bootstrapped, and is designed to
handle the high voltage slew rate associated with floating high-
side gate drivers. The ADP3418 includes overlapping drive
protection to prevent shoot-through current in the external
MOSFETs. The OD pin shuts off both the high-side and the
low-side MOSFETs to prevent rapid output capacitor discharge
during system shutdowns.
The ADP3418 is specified over the commercial temperature
range of 0°C to 85°C, and is available in an 8-lead SOIC
package.
FUNCTIONAL BLOCK DIAGRAM

03229-B
INDUCTOR
12V
Figure 1.
TABLE OF CONTENTS
Specifications.....................................................................................3
Absolute Maximum Ratings............................................................4
ESD Caution..................................................................................4
Pin Configuration and Function Descriptions.............................5
Timing Characteristics.....................................................................6
Typical Performance Characteristics.............................................7
Theory of Operation........................................................................9
Low-Side Driver............................................................................9
High-Side Driver..........................................................................9
Overlap Protection Circuit...........................................................9
Application Information................................................................10
Supply Capacitor Selection.......................................................10
Bootstrap Circuit........................................................................10
MOSFET Selection.....................................................................10
PC Board Layout Considerations.................................................12
Outline Dimensions.......................................................................14
Ordering Guide..........................................................................14
REVISION HISTORY
8/04—Data Sheet Changed from Rev. A to Rev. B

Updated Figure 1; Deleted Figure 2.....................................................1
Updated Specifications Table...............................................................3
Updated Pin Description......................................................................5
Updated Theory of Operation.............................................................9
Updated Applications Section............................................................10
Change to Ordering Guide.................................................................14
4/04—Data Sheet Changed from Rev. 0 to Rev. A

Updated Format......................................................................Universal
Change to General Description...........................................................1
Change to Figure 13..............................................................................8
Change to Ordering Guide.................................................................12
3/03—Revision 0: Initial Version

SPECIFICATIONS1
VCC = 12 V, BST = 4 V to 26 V, TA = 0°C to 85°C, unless otherwise noted.
Table 1.


1 All limits at temperature extremes are guaranteed via correlation using standard Statistical Quality Control (SQC). For propagation delays, tpdh refers to the specified signal going high, and tpdl refers to it going low.
ABSOLUTE MAXIMUM RATINGS
Table 2.

Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability. Absolute maximum ratings apply individually
only, not in combination. Unless otherwise specified, all voltages
are referenced to PGND.
ESD CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
03229-B
DRVH
PGND
DRVL
BST
VCCOD
Figure 2. Pin Configuration
Table 3. Pin Function Descriptions

TIMING CHARACTERISTICS
DRVH
OR DRVL

03229-B
Figure 3. Output Disable Timing Diagram
DRVL
DRVH-SW

03229-B
Figure 4. Timing Diagram. Timing is referenced to the 90% and 10% points, unless otherwise noted.
TYPICAL PERFORMANCE CHARACTERISTICS
03229-B
Figure 5. DRVH Rise and DRVL Fall Times
03229-B
-006
Figure 6. DRVH Fall and DRVL Rise Times
03229-B
JUNCTION TEMPERATURE (°C)
ISE TIM
03229-B
JUNCTION TEMPERATURE (°C)
FALL TIME (ns)
Figure 8. DRVH and DRVL Fall Times vs. Temperature
03229-B
LOAD CAPACITANCE (nF)1234
ISE TIM
Figure 9. DRVH and DRVL Rise Times vs. Load Capacitance
03229-B
LOAD CAPACITANCE (nF)1234
FALL TIME (ns)
03229-B
IN FREQUENCY (kHz)
CURRE
NT (mA)
Figure 11. Supply Current vs. Frequency
03229-B
JUNCTION TEMPERATURE (°C)
CURRE
NT (mA)
Figure 12. Supply Current vs. Temperature
03229-B
VCC VOLTAGE (V)01234
DRV
L OUTP
UT V
LTAGE
(V
Figure 13. DRVL Output Voltage vs. Supply Voltage
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