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ADG528ABQN/a10avaiCMOS LATCHED 4/8 CHANNEL ANALOG MULTIPLEXERS
ADG528AKNADIN/a19avaiCMOS LATCHED 4/8 CHANNEL ANALOG MULTIPLEXERS
ADG528AKPADN/a30avaiCMOS LATCHED 4/8 CHANNEL ANALOG MULTIPLEXERS
ADG528ATQADN/a5avaiCMOS LATCHED 4/8 CHANNEL ANALOG MULTIPLEXERS
ADG529AKNADN/a12774avaiCMOS LATCHED 4/8 CHANNEL ANALOG MULTIPLEXERS
ADG529AKPADN/a82avaiCMOS LATCHED 4/8 CHANNEL ANALOG MULTIPLEXERS
ADG529ATQADN/a3avaiCMOS LATCHED 4/8 CHANNEL ANALOG MULTIPLEXERS


ADG529AKN ,CMOS LATCHED 4/8 CHANNEL ANALOG MULTIPLEXERSViIIVUft Channstl Analna Iilhdtinlo3rorn- WIUIIU" H V VIIHIIIIVI nnluiua "'""'e"""" "thlnf ..
ADG529AKP ,CMOS LATCHED 4/8 CHANNEL ANALOG MULTIPLEXERSViIIVUft Channstl Analna Iilhdtinlo3rorn- WIUIIU" H V VIIHIIIIVI nnluiua "'""'e"""" "thlnf ..
ADG529ATQ ,CMOS LATCHED 4/8 CHANNEL ANALOG MULTIPLEXERSViIIVUft Channstl Analna Iilhdtinlo3rorn- WIUIIU" H V VIIHIIIIVI nnluiua "'""'e"""" "thlnf ..
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ADG528ABQ-ADG528AKN-ADG528AKP-ADG528ATQ-ADG529AKN-ADG529AKP-ADG529ATQ
CMOS LATCHED 4/8 CHANNEL ANALOG MULTIPLEXERS
ANALOG
DEVICES
Latched 4/8 Channel Analog Multiplexers
AiM2M/h0lli52M
FEATURES
44V Supply Maximum Rating
Vss to Vor, Analog Signal Range
Single/Dual Supply Specifications
Wide Supply Ranges (10.8V to 16.5w
Microprocessor Compatible (100ns ITfiit- Pulse)
Extended Plastic Temperature Range
t--4tPC to +85''Cl
Low Leakage t20PA typ)
Low Power Dissipation l28mW max)
Available in 16-Lead MP and
20-Lead LCCC/PLCC Packages
Superior Alternative to:
GENERAL DESCRIPTION
T he ADGSZSA and ADG529A are CMOS monolithic analog
multiplexers with 8 channels and dual 4 channels respectively.
On-chip latches facilitate microprocessor interfacing. The
ADGSZSA switches one of 8 inputs tu a common output depending
on the state of three binary addresses and an enable input. The
ADG529A switches one of 4 differential inputs to a common
differential output depending on the state of two binary addresses
and an cnabie input. Both devices have TTL and 5V CMOS
logic compatible digital inputs,
The ADG528A and ADG529A are designed or: an enhanced
LCIMOS process which gives an increased signal capability of
Vss to Vor, and enables operation over a wide range of supply
voltages. The devices can comfortably operate anywhere in the
10.8V to 165V single or dual supply range. These multiplexers
also feature high switching speeds and low RON.
PRODUCT HIGHLIGHTS
1. Single/Dual Supply Spccifications with a Wide Tolerance:
The devices are specified in the 10.8V to 16.5V range for
both single and dual supplies.
2. Easiiy Interfaced:
The ADGSZSA and ADG529A can be easily interfaced with
microprocessors. The irrrt" signal latches the state of the
address control lines and the enable line. The "R’s, signal
clears both the address and enable data in the latches resulting
in no output (all switches off). "ii-fi'" can be tied to the micro-
processor reset pin.
REV. A
Information furnished by Analog Devices is believed to he accurate and
reliable, However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implicatian or
otherwise under any patent or patent rights of Analog Devices.
3. Extended Signal Range:
FUNCTIONAL BLOCK DIAGRAMS
ADGSZBA
DECODER!
LATCHES
At A1 A2 EN iig
ADGS29A
DECODER/
LATCHES
The enhanced LCZMOS processing results in a high breakdown
and an increased analog signal rungu of Vss m Voo.
4. Break-Before-Make Switching:
Switches are guaranteed break-beforc-makc so that input
signals are protected against momentary shorting.
. Low Leakage:
Leakage currents in the range of 20PA make these multiplcxcrs
suitable. for high precision circuits,
ORDERING GUIDE
Temperature Package
Model' Range Option'
ADG528AKN - 40°C to + 85°C N-28
ADG528AKP t., 40°C to + 85°C P-20A
ADG528ABQ - 40°C to + 85°C Q-18
ADG528ATQ3 -55''Cto + 125°C Q-ls
ADGSZ8ATE3 -55"Cto + 125°C E-20A
ADGSZ9AKN - 40°C to + 85''C N-18
ADG529AKP - 40°C to + 85°C P-20A
ADG529ABQ - 4iy'Cto + MPC Q-18
ADG529ATQ3 - 55°C to ' 125°C Q-18
ADGSZ9ATE3 - 55'C to +125"C ti-NA
'To order M1L-STDG83, Class B processed parts, add
/883B to part number. See Analog Devices Military
Products Datebook (1990) for military data sheet.
2E - Leadiess Ceramic Chip Carrier (LCCC); N TT
Plastic DIP; P " Plastic leaded Chip Carrier (PIPE):
Q r Cerdip.
One Technology Way. PO. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
Telex: 524491
Fax: 61 71326-8703
wa: 710/354-6577
Cubic: ANALOG NORWOODMASS
MiyifilM/hln52n--$PEiyFlWirlaS
Dual Supply Wm, = +10.8V to +16.5V. Ilss Td.' -IB.8V to 46.59 unless othenvise noted.)
ADGSZSA ADG528A ADGSZSA
ADGSZ9A ADGS29A ADG529A
K Version B Version T Version
- MPC to - 40"C to - 55''C to
Parameter + 25"C + 85"C + 25''C + 85°C f 25"C f 125°C Units Comments
ANALOG SWITCH F
Analog Signal Range Vss Vss Vss Vss Vss Vss V min
Vor, Vor, Voo su, Vos, Voo V max
Ros 220 280 280 myp ~10stss 'r10V,losr-vlmN,TestCircuitl
450 600 450 600 450 600 n max
300 400 300 400 Qmax V99: 15W: 10%),V55= -i5Wtltm)
300 400 n max VDD- 15W t 5%), Vss - _ ISV( l 5%)
Ros, Drift 0.6 0.6 0.6 5KNDryp -10VsaVss, + l0V,Im: lmA
RosMatch 5 5 5 %typ -l0VsriVssrr IOVJDS= imA
ls (OFF), Offlnpul Leakage 0.01 0.02 0.02 nh typ V1= t 10V, V2 = i:l0ViTestcircuit2
l 50 l 50 E 50 nA max
IDLOFF), otfoutput Leakage 0.04 0.04 0.04 ah typ V1: ' lov, V2 = T 10V; Test Circuit 3
ADGSZSA 1 mo 1 100 l 100 nA max
ADG529A l 50 l 50 l 50 nA max
117(ON),0n Chamoeluakage 0.04 0.04 0.04 ahtyp VI = :10V,V2= sItN;TestCircuit4
ADGSZRA 1 mo 1 loo 1 mo nAmax
ADGS 29A 1 50 l 50 l 50 ah max
1onm, Differential Ofmepm
1xakagc(ADG529A only) its 25 25 nA max VI = 1 10V, V2 =" I 10V; TestCircuit 5
DXGXTAL CONTROL
VIN", Input High Voltage 2.4 2.4 2 .4 V min
VIM, Input Low Voltage 0.8 0.8 0.8 V max
IlNLorIlNH I I I isAmas Vm=0wVDD
Crs Digital Input Capacitance g 8 8 pF max
DYNAMIC CHARACTERISTICS1
Immmm 200 gin 200 ns typ Vt = :10V,V2 = i IOV; TcstCircuu 6
300 400 300 400 300 400 ns max
lopm 50 50 50 ns typ Test Circuit 7
25 10 25 IO 25 10 ns min
toN(EN,WTt') 200 200 200 ns typ Test Circuits B and 9
TOO 400 300 400 300 400 [15 max
IOFHEN .WS) 200 200 200 ns WP Test Circuits 8 and 10
300 400 300 400 300 400 ns max
twWrite Pulse Width 100 120 100 120 100 130 nsmin See Figure}
ts Address, Enable Setup Time 100 100 100 as mm See Figure 1
tr, Address, Enable Hold Time 10 10 10 ns min See Figure I
Ins Reset Pulse Width 100 100 100 ns min See Figure 2
OFFlsolaxion 68 68 68 dBtyp Vm20.8V,RL= RILCL: ISpF,
50 50 50 113 min V3: 7V rms,f= mOkHz
Cs (OFF) 5 s 5 ptr typ Yrs. = 0.8V
Co (OFF)
ADGSZBA 22 22 22 pF typ V5”: 0.8V
ADG529A ll ll 11 pF typ
QINJ,Chargc Iniccdon 4 4 4 pCzyp RSxOQ, Vs=0V;TestCircuit ll
POWER SU PPLY
hu, 0.6 0.6 0.6 mAtyp Vm=V,NL or VINE
1 .5 1.5 l .5 mA max
Iss 20 20 20 whtyp vmn‘v‘mmr Vom
0.2 (1.2 0.2 mA max
Power Dissipation IO 10 10 mW typ
28 28 28 mW max
'sampie tasted at + 25°C Ioensun compliancr.
Specifications suhrect to change without notice.
-2- REV. A
Single Supply (h, = +16.8V to +1s.5v, Ilss TC. Mil = illl unless otherwise noted.)
Jil1tyi28ll/lgliyi2M
ADGSZBA ADGSZSA ADGSZSA
ADGSEA ADG529A ADG529A
K Version B Version T Version
-4trcto -Mrc to -5YC to
Parameter + 25'C + 85''C + 2VC + BS’C + 25°C + 125'C Units Comments
ANALOG SWITCH
Analog Signal Range GND GND GND GND GND GND V min
Vor, Voo VDD 'bo Von Von V max
RON 500 500 500 II lyp GNDsVss + lov, Ins = iMrnA;Testcircait1
700 l 000 700 £000 700 1000 it max
Ros Drift 0.6 0.6 0.6 %/°Ctyp GNDEVS‘E j 10V, IDS=0.5mA
RCNMatch S 5 5 %typ GNDSV;$* 10V,Imz0.5mA
15(OFF). Off[npm Leakage 0.02 0.02 0.02 nh typ VI = ' 10V/GND, V2 :GNDH 10V
1 50 I 50 1 50 nA max Test Circuit 2
Io(OFF),0ffthttput Leakage 0.04 0.04 0.04 nAlyp V1: ' lOV/GND,V2 =GNDI+ 10V
ADGSZSA l 100 l IN l [00 nA max Test Circuit 3
ADO529A l 50 1 50 I 50 nA max
1rAoN),0nChanmtlLakagt: 0.04 0.04 0.04 nAtyp VI = +10VIGND, VZZGNDI+10V
ADGSZSA I 100 l 100 l 100 nA max TestCircuit4
ADGS 29A J 50 l 50 l so nA mu
Imrrrr, DifferentialOffOutput Vl = + IOV/GND, V2 = GND/ + 10V
Leakage (ADGSZQA only) 25 25 25 nA max Test Circuit 5.
DIGITAL CONTROL
VIN“, Input High Voltage 2.4 2.4 2.4 V mm
VNL. Input Low Voitage 0.8 0.8 0.8 V max
Irrm or ‘mu l 1 I " max Vm=0to Vm,
Cm Digital Input Capacitance g 8 8 pF max
DYNAMIC CHARACTERISTICS'
mm.” 300 300 300 nstyp VI = + 10WGND, v2 = GND/ + 10v; TestCircuit 6
450 an 450 600 450 600 ns max
tom. 50 so 50 us typ Tesl Circuit 7
25 IO 25 10 25 IO ns mm
tor: (EN, WK) 250 250 250 ns typ Test Circuits 8 and 9
450 600 450 MD 450 600 ns max
tOFF' (EN/kip 250 250 250 ns typ Test Circuits 8 and 10
450 GM 450 600 450 600 ns max
twWrite PulseWidth Ith) 120 100 IN 100 130 nsmin See Figure]
ts Address, Enable $etupTime |00 100 100 nsmin See Figure}
tre Address, Enable Hold Time 10 IO 10 ns min See Figure 1
Ins Reset Pulse Width 100 100 100 ns min See Figure 2
OFF Isolation 68 68 68 dB typ Iles = OAV, RL = lef1,Cr, = ISpF,
50 50 50 dBmin Vs=3.5Vrms,f-= IOOkHz
Cs (OFF) 5 5 5 pF typ VEN = 0.8V
G, (OFF)
ADGS28A 22 22 22 thyp VEN=0.8V
ADG529A n n ll pFlyp
Qtter. Charge Injection 4 4 4 pC lyp Rs = on,vs = 0V; Test Circuit t I
POWER SUPP, .Y
loo 0.6 on 0.6 mA typ Vm = Vrm.or VIN“
, .5 1.5 1.5 mA max
Power Dissipation I I l l l 1 mW tyy
" 25 " mW max
'Sample tested n: + 15°C to ensure compliance.
Specifications suhiccl to change without notice.
REV. A -3-
ADGSZBA/ADGSZBA
ABSOLUTE MAXIMUM RATIN GS*
(i A c + 25''C unless otherwise noted)
Voo to Vss .rr..r..r..-..- 44V
V01) to GND .l'.m...........r.. 25V
Vss to GND ....................... - 25V
Analog Inputsi
Voltage at S, D ................. Vss _ 2V to
VDD + 2V or
20mh, Whichever Occurs First
Continuous Current, S or D ............. 20mA
Pulsed Current S or D
lms Duration, 10% Duty Cycle .......... 40mA
'Overvoltage atA, EN ' Tiii, Tig, S m- D will be clamped by diodes. Current
should be timhed ta the maximum rating above.
Digital Inputs'
Voltage at A, EN, WIT, R ........... Vss -4V to
VDD + 4V or
20mA, Whichever Occurs First
Power Dissipation (Any Package)
Up to + 75''C ................... 470mW
Derates above +7S°C by ............. 6mW/°C
Operating Temperature
Commerical (K Version) ......... - 40''C to + 85''C
Industrial (B Version) ........... - 40"C to "-85'C
Extended (T Version) ........... - 5!PC to + 125°C
Storage Temperature Range ......... --6SoC to + 150T.
Lead Temperature (Soldering, 10sec) ......... + 300°C
'COMMENT: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a suess rating only and
functional operation of the device at these or any other conditions above those indicated in the operational sections of this stmcification is not implied, Exposure
to absolute maximum rating conditions for extended periods may affect device reliability.
CAUTION
ESD (electrostatic discharge) sensitive device. Thc digital control inputs are diode protect-
ed; however, permanent damage may occur on unconnected devices subject to high energy
electrostatic fields. Unused devices must be stored in conductive foam or shunts. The protective
foam should be discharged to the destination socket before devices are removed.
G!G%fml
ESD SENSITIVE DEVICE
PIN CONFIGURATIONS
wii Cr a " i3
1. E E a,
m E: [El A, " "
Va: E " cm: t om
A9652“ " v
51 E rorwzw " Vac 70"W m A0652“
[Nu m Sum Plat ttt 5"” u " 10' VIEW
" E E ss (Km Ea Suit!
S! , " "
" ' " S, I " " " "
o m " a a It ll B m~~ocou~£cv
G ° y tl S Nc;uocomzcr
wn E . ll 8
A, E " A,
an a " one m4 " mo
v.‘ [I E] m,o vs. 1 17 Van
ADGSZM
su E rur mm " s13 SM ' 107m " '"
mm to Sat.) 3" , Wot to Sam " 52.
SRA E '1 $25
Ell I " MB
w E " 53.
5“ I " S“ . " " " "
m E " DB 1 a g D a NC T MocoNNicv
33 2 ' inesnocouum
TRUTH TABLES
A2 A1 A0 EN'Wi E ONSWITCHPm
x X X X I l Retains Previous Switch Condition
x x x x x o NONE(AddressastdErtab1e
h 1 - -
x x x 0 0 1 :31wa) Al A0 EN wn RS ON smrcumm
0 0 0 l 0 l l x x X I I Retains Previous Switch Condition
0 o 1 1 o 1 2 x x x x o NONE(Addressami Eaable
o 1 o 1 o 1 3 Utchescleared)
o 1 1 1 o 1 4 x x o 0 1 NONE
1 o o 1 o 1 5 o a 1 o I 1
I o 1 1 o 1 5 o 1 1 o 1 2
1 I o 1 o 1 7 1 o 1 o i 3
1 1 1 1 o 1 s I 1 1 o 1 4
x = Don't Care ADG528A x a Don't thre ADG529A
-4- REV. A
MiN8Miiliyi2n
TIMING DIAGRAMS
--tw-----
I-ts--- tn F-
3V 2 V
EN, A0. A1, (A2) .0
0 th8ht
Figure 1
Figure 1 shows the timing sequence for latching the switch
addressed enable inputs. The latches arelevel sensitive; therefore,
while WR is held low, the latches are transparent and the switches
respond to the address and enable inputs. This input data is
latched on the rising edge of W.
Typical Performance Characteristics
f-toss i'')-----)
SWITCH 1k
OUTPUT " Vo
Figure 2
Figure 2 shots the Reset Pulse Width, IRS, and Reset Turn-off
Time, tbrrt (RS).
Note: All digital input signals rise and fall times measured from
10% to 90% of 3V. tR---tr---20ns.
The multiplexers are guaranteed functional with reduced single or dual supplies down to 4.5V.
van - "SV
Vss = V FV
.. Mi) / \
v , a; new
m 300 V2; -1th8V
2w rf‘ --i""srt.,,,
Vnn = +15v _..,...,""';.....,,
Vss = -t5V
-to ~15 ~10 -ti o 5 1o 15 20
VvNsl-Morts
RON as a Function of VoiVs): Dual Supply Voltage.
TA = +2ty'C
vm, = +16.5V
Ws "T, _-tik5V
'f m /
F, 10 (on) e,,--""
g ID(0FF1 "i-"''
'f.', T ",,='" -"'
Si /r’ //
g / //
0.1 ",,--rCt'''e'C _..---'''" s
25 " " 55 65 75 " 95 105 115 125
TEMPERATURE - t
Leakage Current as a Function of Temperature
(Note: Leakage Currents Reduce as the Supply Voltages
Reduce)
REV. A
:2 ,/W
- 20 ~15 - " -s 0 5 10 15 20
VOW“) - Volts
RON as a Function of Vows): Single Supply Voltage,
TA = +2500
i', /\
.2 "ss,
t ( 's
2 's,,,
r- "ss.,,
-"---.,
15 I i l l 1
5 E , It 5 ID 11 12 td 14 It:
SUPPLY VOLTAGE - Volts
Trigger Levels Vs. Power Supply Voltage, Dual or Single
Supply, T, r: +25°C
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