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ADC10065CIMTXNSN/a160avaiV(cc): 3.9V; 10-bit, 65 MSPS, 3V; A/D converter. For ultrasound and imaging, instrumentation, cellular based stations/communications receivers, sonar/radar. xDSL, wireless local loops, etc.


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ADC10065CIMTX
V(cc): 3.9V; 10-bit, 65 MSPS, 3V; A/D converter. For ultrasound and imaging, instrumentation, cellular based stations/communications receivers, sonar/radar. xDSL, wireless local loops, etc.
ADC10065
10-Bit 65 MSPS 3V A/D Converter
General Description

The ADC10065isa monolithic CMOS analog-to-digital con-
verter capableof converting analog input signals into 10-bit
digital wordsat65 Megasamples per second (MSPS). This
converter usesa differential, pipeline architecture with digital
error correction andan on-chip sample-and-hold circuitto
providea complete conversion solution, andto minimize
power consumption, while providing excellent dynamic per-
formance.A unique sample-and-hold stage yieldsa full-
power bandwidthof 400 MHz. Operatingona single 3.0V
power supply, this device consumes just 68.4 mWat MSPS, including the reference current. The Standby
feature reduces power consumptionto just14.1 mW.
The differential inputs provideafull scale selectable input
swingof2.0 VP-P,1.5 VP-P,1.0 VP-P, withthe possibilityofa
single-ended input. Full useofthe differential inputis recom-
mendedfor optimum performance.An internal +1.2V preci-
sion bandgap referenceis usedto set the ADC full-scale
range, and also allows the userto supplya buffered refer-
enced voltagefor those applications requiring increasedac-
curacy. The output data formatis 10-bit offset binary,or two’s
complement.
This deviceis availableinthe 28-lead TSSOP package and
willoperate overthe industrial temperature rangeof −40˚Cto
+85˚C.
Features
Single +3.0V operation Selectable 2.0 VP-P, 1.5 VP-P,or1.0 VP-P full-scale input
swing 400 MHz−3dB input bandwidth Low power consumption Standby mode On-chip reference and sample-and-hold amplifier Offset binaryor two’s complement data format Separate adjustable output driver supplyto
accommodate 2.5V and 3.3V logic families 28-pin TSSOP package
Key Specifications
Resolution 10 Bits Conversion Rate 65 MSPS Full Power Bandwidth 400 MHz DNL ±0.3 LSB (typ) SNR(fIN=11 MHz) 59.6dB (typ) SFDR (fIN=11 MHz) −80dB (typ) Data Latency 6 Clock Cycles Supply Voltage +3.0V Power Consumption,65 MHz 68.4 mW
Applications
Ultrasound and Imaging Instrumentation Cellular Based Stations/Communications Receivers Sonar/Radar xDSL Wireless Local Loops Data Acquisition Systems DSP Front Ends
Connection Diagram

November 2004
ADC10065
10-Bit
MSPS
A/D
Converter
ic,good price


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