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AD842ADN/a1avaiWideband, High Output Current, Fast Settling Op Amp


AD842 ,Wideband, High Output Current, Fast Settling Op AmpCHARACTERISTICSVoltage R ≥ 500 Ω 10 10 10 VLOADCurrent V = ±10 V 100 100 100 mAOUTOpen Loop 5 5 ..
AD842JH ,Wideband, High Output Current, Fast Settling Op AmpCHARACTERISTICSVoltage R ≥ 500 Ω 10 10 10 VLOADCurrent V = ±10 V 100 100 100 mAOUTOpen Loop 5 5 ..
AD842JH ,Wideband, High Output Current, Fast Settling Op AmpAPPLICATIONSLine DriversTO-8 (H) Package SOIC (R-16) PackageDAC and ADC BuffersVideo and Pulse Ampl ..
AD842JN ,Wideband, High Output Current, Fast Settling Op AmpSPECIFICATIONS1 2Model AD842J/JR AD842K AD842SConditions Min Typ Max Min Typ Max Min Typ Max Units3 ..
AD842JQ ,Wideband, High Output Current, Fast Settling Op AmpFEATURESAC PERFORMANCEPlastic DIP (N) Package LCC (E) PackageGain Bandwidth Product: 80 MHz (Gain = ..
AD842KN ,Wideband, High Output Current, Fast Settling Op Ampapplications where thecircuit gain will be 2 or greater.*Covered by U.S. Patent Nos. 4,969,823 and ..
ADP3415LRM-REEL ,Dual MOSFET Driver with Bootstrappingfeatures an overlapping protectionSTATE LOGICcircuit (OPC); undervoltage lockout (UVLO) that holds ..
ADP3415LRM-REEL ,Dual MOSFET Driver with BootstrappingSpecifications subject to change without notice.–2– REV. BADP3415ABSOLUTE MAXIMUM RATINGS* PIN CONF ..
ADP3415LRM-REEL7 , Dual MOSFET Driver with Bootstrapping
ADP3415LRMZ-REEL ,Dual MOSFET Driver with BootstrappingSPECIFICATIONS unless otherwise noted.)Parameter Symbol Conditions Min Typ Max UnitSUPPLY (VCC)2Qui ..
ADP3415LRMZ-REEL ,Dual MOSFET Driver with BootstrappingGENERAL DESCRIPTION5V VThe ADP3415 is a dual MOSFET driver optimized for driving DCINtwo N-channel ..
ADP3416JR ,Dual Bootstrapped MOSFET DriverSpecifications subject to change without notice.–2– REV. AADP3416ABSOLUTE MAXIMUM RATINGS* ORDERING ..


AD842
Wideband, High Output Current, Fast Settling Op Amp
REV.E
Wideband, High Output Current,
Fast Settling Op Amp
PRODUCT DESCRIPTION

The AD842 is a member of the Analog Devices family of wide
bandwidth operational amplifiers. This device is fabricated using
Analog Devices’ junction isolated complementary bipolar (CB)
process. This process permits a combination of dc precision and
wideband ac performance previously unobtainable in a mono-
lithic op amp. In addition to its 80 MHz gain bandwidth, the
AD842 offers extremely fast settling characteristics, typically
settling to within 0.01% of final value in less than 100 ns for a
10 volt step.
The AD842 also offers a low quiescent current of 13 mA, a high
output current drive capability (100 mA minimum), a low input
voltage noise of 9 nV√Hz and a low input offset voltage (1 mV
maximum).
The 375 V/µs slew rate of the AD842, along with its 80 MHz
gain bandwidth, ensures excellent performance in video and
pulse amplifier applications. This amplifier is ideally suited for
use in high frequency signal conditioning circuits and wide
bandwidth active filters. The extremely rapid settling time of
the AD842 makes this amplifier the preferred choice for data
acquisition applications which require 12-bit accuracy. The
AD842 is also appropriate for other applications such as high
speed DAC and ADC buffer amplifiers and other wide band-
width circuitry.
APPLICATION HIGHLIGHTS
The high slew rate and fast settling time of the AD842 make
it ideal for DAC and ADC buffers amplifiers, lines drivers
and all types of video instrumentation circuitry.The AD842 is a precision amplifier. It offers accuracy to
0.01% or better and wide bandwidth; performance previously
available only in hybrids.Laser-wafer trimming reduces the input offset voltage of
1 mV max, thus eliminating the need for external offset
nulling in many applications.Full differential inputs provide outstanding performance in
all standard high frequency op amp applications where the
circuit gain will be 2 or greater.The AD842 is an enhanced replacement for the HA2542.
FEATURES
AC PERFORMANCE
Gain Bandwidth Product: 80 MHz (Gain = 2)
Fast Settling: 100 ns to 0.01% for a 10 V Step
Slew Rate: 375 V/�s
Stable at Gains of 2 or Greater
Full Power Bandwidth: 6.0 MHz for 20 V p-p
DC PERFORMANCE
Input Offset Voltage: 1 mV max
Input Offset Drift: 14 �V/�C
Input Voltage Noise: 9 nV/√Hz typ
Open-Loop Gain: 90 V/mV into a 500 � Load
Output Current: 100 mA min
Quiescent Supply Current: 14 mA max
APPLICATIONS
Line Drivers
DAC and ADC Buffers
Video and Pulse Amplifiers
Available in Plastic DIP, Hermetic Metal Can,
Hermetic Cerdip, SOIC and LCC Packages and in
Chip Form
MIL-STD-883B Parts Available
Available in Tape and Reel in Accordance with
EIA-481A Standard
CONNECTION DIAGRAMS
Plastic DIP (N) Package
and
Cerdip (Q) Package
LCC (E) PackageBALANCENCBALANCENC
–IN
+INNCNC
+VS
OUTPUT212019111213
NC = NO CONNECT
TO-8 (H) PackageNCNC
NC = NO CONNECT
BALANCE
–INPUT
+INPUTV–
OUTPUT
BALANCE
TOP VIEW
AD842
NOTE: CAN BE TIED TO V+
SOIC (R-16) Package

*Covered by U.S. Patent Nos. 4,969,823 and 5,141,898.
AD842–SPECIFICATIONS
INPUT BIAS CURRENT
INPUT VOLTAGE RANGE
POWER SUPPLY
PACKAGE OPTIONS
NOTESAD842JR specifications differ from those of the AD842JN, JQ and JH due to the thermal characteristics of the SOIC package.Standard Military Drawing available 5962-8964201xx
2A – (SE/883B); XA – (SH/883B); CA – (SQ/883B).Input offset voltage specifications are guaranteed after 5 minutes at TA = +25°C.
(@ +25�C and �15 V dc, unless otherwise noted)
ABSOLUTE MAXIMUM RATINGS1
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±18 V
Internal Power Dissipation2
Plastic (N) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.3 W
Cerdip (Q) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.1 W
TO-8 (H) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.3 W
SOIC (R) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.3 W
LCC (E) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.0 W
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±VS
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . ±6 V
Storage Temperature Range
Q, H, E . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to +150°C
N, R . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to +125°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . +175°C
Lead Temperature Range (Soldering 60 sec) . . . . . . . . +300°C
NOTESStresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.Maximum internal power dissipation is specified so that TJ does not exceed
+150°C at an ambient temperature of +25°C.
Thermal Characteristics:
θJCθJAθSA
Plastic Package30°C/W100°C/W
Cerdip Package30°C/W110°C/W38°C/W
TO-8 Package30°C/W100°C/W27°C/W
16-Lead SOIC Package30°C/W100°C/W
20-Lead LCC Package35°C/W150°C/W
Recommended Heat Sink: Aavid Engineering© #602B
AD842
Figure 1.Input Common-Mode
Range vs. Supply Voltage
Figure 4.Quiescent Current vs.
Supply Voltage
Figure 7.Quiescent Current vs.
Temperature
–Typical Characteristics(at +25�C and VS = �15 V, unless otherwise noted)

Figure 2.Output Voltage Swing
vs. Supply Voltage
Figure 5.Input Bias Current vs.
Temperature
Figure 8.Short-Circuit Current
Limit vs. Temperature
Figure 3.Output Voltage Swing
vs. Load Resistance
Figure 6.Output Impedance vs.
Frequency
Figure 9.Gain Bandwidth Product
vs. Temperature

Figure 10.Open-Loop Gain and
Phase Margin vs. Frequency

Figure 13.Common-Mode
Rejection vs. Frequency
Figure 16.Harmonic Distortion vs.
Frequency
Figure 11.Open-Loop Gain vs.
Supply Voltage

Figure 14.Large Signal Frequency
Response

Figure 17.Input Voltage vs.
Frequency
Figure 12.Power Supply Rejection
vs. Frequency
Figure 15.Output Swing and
Error vs. Settling Time
Figure 18.Slew Rate vs.
Temperature
AD842
Figure 19a.Inverting Amplifier
Configuration (DIP Pinout)
Figure 20a.Noninverting Amplifier
Configuration (DIP Pinout)
Figure 19b.Inverter Large Signal
Pulse Response
Figure 20b.Noninverting Large
Signal Pulse Response
Figure 19c.Inverter Small Signal
Pulse Response
Figure 20c.Noninverting Small
Signal Pulse Response
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