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AD825N/a1000avaiLow Cost, General Purpose, High Speed FET Amplifier


AD825 ,Low Cost, General Purpose, High Speed FET AmplifierSPECIFICATIONSA S AD825AParameter Conditions V Min Typ Max UnitSDYNAMIC PERFORMANCEUnity Gain Bandw ..
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AD825
Low Cost, General Purpose, High Speed FET Amplifier
REV.D
Low-Cost, General-Purpose
High-Speed JFET Amplifier
CONNECTION DIAGRAMS
8-Lead Plastic SOIC (R) Package
16-Lead Plastic SOIC (R-16) Package

FEATURES
High Speed
41 MHz, –3 dB Bandwidth
125 V/�s Slew Rate
80 ns Settling Time
Input Bias Current of 20pA and Noise Current of
10 fA/√Hz
Input Voltage Noise of 12 nV/√Hz
Fully Specified Power Supplies: �5 V to �15 V
Low Distortion: –76 dB at 1 MHz
High Output Drive Capability
Drives Unlimited Capacitance Load
50 mA Min Output Current
No Phase Reversal When Input Is at Rail
Available in 8-Lead SOIC
APPLICATIONS
CCD
Low Distortion Filters
Mixed Gain Stages
Audio Amplifier
Photo Detector Interface
ADC Input Buffer
DAC Output Buffer
PRODUCT DESCRIPTION

The AD825 is a superbly optimized operational amplifier for
high speed, low cost, and dc parameters, making it ideally suited
for a broad range of signal conditioning and data acquisition
applications. The ac performance, gain, bandwidth, slew rate
and drive capability are all very stable over temperature. The
AD825 also maintains stable gain under varying load conditions.
The unique input stage has ultralow input bias current and
ultralow input current noise. Signals that go to either rail on
this high performance input do not cause phase reversals at the
output. These features make the AD825 a good choice as a buffer
for MUX outputs, creating minimal offset and gain errors.
The AD825 is fully specified for operation with dual ±5 V and
±15 V supplies. This power supply flexibility, and the low sup-
ply current of 6.5 mA with excellent ac characteristics under
all supply conditions, make the AD825 well suited for many
demanding applications.
Figure 1.Performance with Rail-to-Rail Input Signals
AD825–SPECIFICATIONS(@ TA = 25�C, VS = �15 V unless otherwise noted)
DYNAMIC PERFORMANCE
POWER SUPPLY
NOTES
All limits are determined to be at least four standard deviations away from mean value..
Specifications subject to change without notice.
AD825
(@ TA = 25�C, VS = �5 V unless otherwise noted)

DYNAMIC PERFORMANCE
POWER SUPPLY
NOTES
All limits are determined to be at least four standard deviations away from mean value.
Specifications subject to change without notice.
SPECIFICATIONS
AD825
ABSOLUTE MAXIMUM RATINGS1

SupplyVoltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±18V
InternalPowerDissipation2
SmallOutline(R) . . . . . . . . . . . . . . . . See Derating Curves
Input Voltage (Common Mode) . . . . . . . . . . . . . . . . . . . ±VS
DifferentialInputVoltage . . . . . . . . . . . . . . . . . . . . . . . . ±VS
Output Short Circuit Duration . . . . . . . See Derating Curves
Storage Temperature Range (R, R-16) . . . . –65°C to +125°C
Operating Temperature Range . . . . . . . . . . . –40°C to +85°C
Lead Temperature Range (Soldering10sec) . . . . . . . . 300°C
NOTES
1Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
2Specification is for device in free air:
8-lead SOIC package: θJA = 155°C/W
16-lead SOIC package: θJA = 85°C/W
ORDERING GUIDE
PIN CONFIGURATION

Figure 2.Maximum Power Dissipation vs. Temperature
CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the AD825 features proprietary ESD protection circuitry, permanent damage may occur on devices
subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
TPC 1.Output Voltage Swing vs. Supply
TPC 2.Output Voltage Swing vs. Load Resistance
SUPPLY VOLTAGE – ±V
SUPPLY CURRENT
mA681012141618
5.5

TPC 3.Quiescent Supply Current vs. Supply Voltage for
Various Temperatures

FREQUENCY – Hz
10010M1k
OUTPUT IMPEDANCE
10k100k1M
0.1

TPC 4.Closed-Loop Output Impedance vs. Frequency

TPC 5.Unity Gain Bandwidth and Phase Margin vs.
Temperature
TPC 6.Open-Loop Gain and Phase Margin vs.
Frequency
AD825

LOAD RESISTANCE – �
10010k1k
OPEN-LOOP GAIN
dB

TPC 7.Open-Loop Gain vs. Load Resistance
TPC 8.Power Supply Rejection vs. Frequency

TPC 9.Common-Mode Rejection vs. Frequency

TPC 10.Large Signal Frequency Response; G = +2

OUTPUT SWING – 0 to �V
SETTLING TIME
ns20–2–4–6–8
160

TPC 11.Output Swing and Error vs. Settling Time
TPC 12.Harmonic Distortion vs. Frequency
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