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AD7579JNADN/a25avaiLC2MOS 10-BIT SAMPLING A/D CONVERTERS
AD7579JN/+ |AD7579JNADN/a10avaiLC2MOS 10-BIT SAMPLING A/D CONVERTERS
AD7579JPADN/a207avaiLC2MOS 10-BIT SAMPLING A/D CONVERTERS
AD7579KNADN/a450avaiLC2MOS 10-BIT SAMPLING A/D CONVERTERS
AD7580AQADN/a5avaiLC2MOS 10-BIT SAMPLING A/D CONVERTERS
AD7580BQADN/a5avaiLC2MOS 10-BIT SAMPLING A/D CONVERTERS
AD7580JNN/a15avaiLC2MOS 10-BIT SAMPLING A/D CONVERTERS
AD7580JNADN/a60avaiLC2MOS 10-BIT SAMPLING A/D CONVERTERS
AD7580JPADN/a370avaiLC2MOS 10-BIT SAMPLING A/D CONVERTERS
AD7580KNN/a8avaiLC2MOS 10-BIT SAMPLING A/D CONVERTERS


AD7579KN ,LC2MOS 10-BIT SAMPLING A/D CONVERTERSFEATURES FUNCTIONAL BLOCK DIAGRAMS 20ps Conversion Time vm, On-Chip Sample-Hold 50kHz Sampli ..
AD7580AQ ,LC2MOS 10-BIT SAMPLING A/D CONVERTERSspecifications apply for full-scale input signals up to 20kHz. 'Accuracy may degrade a! conversion ..
AD7580BQ ,LC2MOS 10-BIT SAMPLING A/D CONVERTERSGENERAL DESCRIPTION The AD7579 and AD7580 are 10-bit, successive approximation ADCs. They have ..
AD7580JN ,LC2MOS 10-BIT SAMPLING A/D CONVERTERSApplications. No missing codes guaranteed over the Bits LSB max LSB max full temperatur ..
AD7580JN ,LC2MOS 10-BIT SAMPLING A/D CONVERTERSfeatures of these devices. They dissipate less than 50mW from a single + 5V supply and 2. Differ ..
AD7580JP ,LC2MOS 10-BIT SAMPLING A/D CONVERTERSApplications. No missing codes guaranteed over the Bits LSB max LSB max full temperatur ..
ADG822BRM ,CMOS Low Voltage 1 Ω Dual SPST SwitchesSPECIFICATIONS–40C to +125C, unless otherwise noted.) –40C to –40C to2Parameter 25C +85C +125 ..
ADG822BRMZ-REEL7 , 1 ohm CMOS, 1.8V to 5.5V, Dual SPST Switches
ADG823BRM ,<1 Ω, Low Voltage (1.8 Vspecifications –40C to +125C, unless otherwise noted.)DD –40C to –40C to2Parameter 25C +85C + ..
ADG824BCPZ-REEL , 0.5 Ω CMOS 1.65 V to 3.6 V Dual SPDT/2:1 Mux in Mini LFCSP Package
ADG836YCP-REEL ,0.5 Ω CMOS 1.65 V TO 3.6 V Dual SPDT/2:1 MUXSPECIFICATIONS (V = 2.5 V ± 0.2 V, GND = 0 V, unless otherwise noted.)DD ..
ADG836YCP-REEL ,0.5 Ω CMOS 1.65 V TO 3.6 V Dual SPDT/2:1 MUXCHARACTERISTICS t 21 ns typ R = 50 , C = 35 pF ON L L ..


AD7579JN-AD7579JN/+-AD7579JP-AD7579KN-AD7580AQ-AD7580BQ-AD7580JN-AD7580JP-AD7580KN
LC2MOS 10-BIT SAMPLING A/D CONVERTERS
ANALOG
DEVICES
LOZIVIOS
10-Bit Sampling fl/O Converters
AD7579/AD7580
FEATURES
zaps Conversion Time
On-Chlp Sample-Hold
50kHz Sampling Rate
25kHz Full-Power Input Bandwidth
Choice of Data Formats
Single +5V Supply
Low Power (50mW)
Skinny 24-Pin DIP and 28-Terminal
Surface Mount Packages T
GENERAL DESCRIPTION
The AD7579 and AD7580 are 10-bit, successive approximation
ADCs. They have differential analog inputs that will accept
unipolar or bipolar input signals while operating from only a
single + 5V supply. Input ranges of 0 to +2.5V, 0 to + 5V and
t 2.5V are possible with no external signal conditioning. Only
an external 2.5V reference and clock and control signals are
required to make them operate.
With conversion time of less than 20ws and an on-chip sample-hold
amplifier, the devices are ideally suited for digitizing ac signals.
The maximum sampling rate is 50kHz, giving an input bandwidth
of 25kHz. The parts are specified not only with traditional static
specifications such as linearity and offset but also with dynamic
specifications (SNR, Harmonic Distortion, IMD).
The AD7579 and AD7580 are microprocessor-compatible with
standard microprocessor control inputs (CS, E, W, RDY,
WT) and data outputs capable of interfacing to high-speed data
buses. There is a choice of data formats, with the AD7579
offering an (8+2) read and the AD7580 offering a 10-bit parallel
Space saving and low power are also features of these devices.
They dissipate less than 50mW from a single + 5V supply and
are offered in a 0.3", 24-pin package and in plastic/ceramic chip
carrier for surface mounting.
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
FUNCTIONAL BLOCK DIAGRAMS
R SAMPLING
le+13 2 R COMPARATOR
Vml-lA 3 - AD7579
vmtim 4 L1
Vttrr 5 want me
- m i I
WR I [ DATA DATA THREE I22 um
- a STATE tt ,
a ' " LATCH SELECYOR BUFFERS
- CONTROL " DB0
INT 10 LOGIC
cm " snn
KEEN "
1 \ fL _p.tN
uv 'lb" 43,
AGND DGND LC.
R 12ff
V l‘lA I
1.. R SAMPLING AD7680
VMHB 2 COMPARATOR
Vnd-M J -
lat-O I -
v." 5 wanna
cs 7 an i b, THREE @039
- " LT‘I'B! In STATE 10- t
WR a [w BUFFERS " 030
RD g CONTROL .
m " LOGIC v_iai]--- l
CLK tt
ABM, noun
1. 20ws conversion time with on-chip sample-hold makes the
AD7579 and AD7580 ideal for audio and higher bandwidth
signals, e.g., modem applications.
2. Differential analog inputs can accept unipolar or bipolar
input signals, but only a single, + 5V power supply is
needed.
3. Versatile and easy-to-use digital interface has fast bus access/
relinquish times, allowing connection to most popular micro-
processors.
One Technology Way, PO. Box 9106. Norwood, MA 02062-9106, U.S.A.
Tel: 6171329-4700 Fax: 617/326-8703 wa: 710/394-6577
Telex: 924491 Cable: ANALOG NORWOODMASS
M757Mllm8lr-$PE0
(vol, = +lill 1 5%, vREF = +2.5v, AGND = Illlllll = tlll;
1ch = 2.5MHz: All" specifications u, to u, unless otherwise
noted. Test conditions as in Figure 12 unless otherwise stated).
FICATIDN
Parameter Versions Versions S Version Units Conditions/Comments
STATIC CHARACTERISTICS These specifications apply for the
Resolution 10 10 10 Bits three Analog Input Ranges.
See Differential Applications.
Integral Nonlinearity l t 1/2 t 1 LSB max No missing codes guaranteed over the
Differential Linearity Error t 0.9 t 0.9 t 0.9 LSB max full temperature range'.
Full-Scale Error + 5 t 5 + 5 LSB max
Zero Code Errors t 2 t 1 t 2 LSB max Connected as in Figure 12.
t 3 1 2 t 3 LSB max Connected as in Figure Hot 15.
PowerSupply Rejection 10.5 10.5 10.5 LSB max 4.75VDYNAMIC CHARACTER] STICS“S
Conversion Times 16.9 16.9 16.9 ps min fcrm = 2.5MHz, twre = 100ns.
18.5 18.5 18.5 115 max See Functional Description.
Sampling Rate 50 50 50 kHz max
Clock Range 250/2 .5 250/2. 5 250/2.5 kHz min/MHz max
Signal-to-Noise Ratio 55 55 55 dB min See Terminology. TA=25°C.
58 60 58 dB lyp
Total Harmonic Distortion - 58 - 58 - 58 dB max T, = 25°C.
- 64 - 68 - 64 dB typ
Intermodulation Distortion - 67 - 67 - 67 dB typ This is characterized to both SMPT E
and CCITT standards. TA = 25°C.
Slew Rate 160 160 160 mV/ps max See Terminology
ANALOG INPUT RANGES7
Figure 12 AD7579/AD7580 connected as in Figure 12
Span VRI-tF VREF VREF V max
Common-Mode Range 0 to Voo 0to Voo 0 to Vor, V max
CMRR 0.5 0.5 0.5 LSBN typ
Figure 14 AD7579/AD7580 connected as in Figure 14
Span ZVRE): ZVRE}: ZVREF V max
Cdmmon-Mode Range 0 to ZVnn 0 to 2Voo 0 lo Ivor, V max
CMRR 0.5 0.5 0.5 LSB/V typ
Figure 15 AD7579/AD7580 connected as in Figure 15
Span ZVREF ZVREF ZVREF V max
Common-Modc Range - Var].- to - VREF to - VREF to V max
(2Von - VREF) (2Voo - VREF) (ZVDD - VREF)
CMRR 0.5 0.5 0.5 LSB/V typ
ATTENUATOR INPUT RESISTANCE 5/15 5/15 5/15 kn min/KO max 10kfl typical. Resistance measured between
Vrrc( + )A, Vrrd + )B or Vm( - )A, Vm( - )3
COMPARATOR INPUT RESISTANCE 10 10 10 MO min AD7579/AD7580 connected as in Figure 12
REFERENCE INPUT .
VREF (For Specified Performance) ' 2.5 + 2.5 + 2.5 V t 5%
[REF 1.5 1.5 1.5 mAmax
LOGIC INPUTS
a, E, W, HBEN, CLK
Vom, Input Low Voltage 0.8 0.8 0.8 V max
VIN", Input High Voltage 2.4 2.4 2 .4 V min
Irs, Input Current
25'C 11 tl tl " max vrs--0orvoo
Tmton 110 110 110 WAmax Vm=00rVDD
Cm, Input Capacitance' 10 10 10 pF max
LOGIC OUTPUTS
DBO to DB7 (DB9)
VOL, Output Low Voltage 0.4 0.4 0.4 V max Isom = 1.6mA
Voss, Output High Voltage 4.0 4.0 4.0 V min ISOURCE = 400WA
Floating State Leakage Current 1 1 1 l t 10 wA max V0. rr = 0 to Von
Floating State Output 10 10 10 pF max
Capacitance‘
RDY, W
Voc, Output Low Voltage 0.4 0.4 0.4 V max IsrNx = 1.6mA
POWER REQUIREMENT
Vor, + 5 + , + 5 V t 5% for Specified Performance
Inn 10 10 10 mAmax Typically 5mAwith Voo-- +5V
Power Dissipation 50 50 50 mW max
'Temperature Rangesas follows:
J, K Versions;0 to + hrc
A, B Versions; - 25°C In + MT:
s Version; - 55TD to +125°C
2Zerocode error and gain error adjusted to zero.
'Zerocodeertor is measured with respect to In ideal first code tmsitjon which occurs " 1/2LSB.
‘Simple tested at 25°C to :nsun: com pliunce.
SThese specifications apply for full-scale input signals up to 20kHz.
'Accuracy may degrade u conve mien times other then those specified.
'vod + )mustatways beequal Ioormore positive than V.N( - ), in Figurcs12,l4,l5.
Stm:ifications subject m change without notice.
REV. A
A0757Mril758il
TIMING SPECIFICATIONS‘
Limit at Limit at Limit at
25°C Tus, Tm Tu,, Tun:
Parameter" (All Grades) (J , K, A, B Grades) (S Grade) Units Test Conditions/Comments
t. 0 0 0 ns min 3 to Ig-rIt Setup Time
ta 40 50 50 nsmin WMscwmm
t3 0 0 0 ns min c-s to W Hold Time
u 100 100 120 ns max 1trRtorRTPropagation Delay
ts 0 0 0 ns min c-s to E Setup Time
tg In t12 t12 nsmin "R-DPulseWidth
t7 0 0 0 ns min E to T6 Hold Time
Is 20 20 30 ns min HBEN to E Setup Time
te 10 10 10 nsmin HBENto@Hoid Time
tw 110 135 150 ns min RDY Access Time
tl 1 100 100 120 as max R-ly totr7f Propagation Delay
t1; 1 10 135 150 ns max Data Access Time After F5
tis 10 10 10 ns min Data Hold Time, RDY Hold Time
65 80 90 us max
1. Timing specifications are sample tested at + 25'C to ensure compliance. All input control signals are specified with
tR=tF=20ns (MPA to 90% of + 5V) and timed from a voltage level of + 1.6V.
2. u, ho, tu and tn are measured with the load circuits of Figures 3 and S and defined as the time required for an output
to cross 0.8V or 2.4V.
3. tty is defined as the time required for the data lines to change 0.5V when loaded with the circuits of Figure 4.
4. INT and RDY are opcn-dmin outputs and need 3kft external pull-up resistors for operation.
Specifications subject to change without notice.
-W HAS A an) EXTERNAL PULL-UP RESISTOR
Figure 1. AD7579/AD7580 Start Cycle Timing
P-te-e l
mm: I' J222
_i_1 I
NT. , l I
t ' _.4
RDY* P-"'"'', T' 1
q RDY VALID A
DATA mcmMPstcE I IHIGHlMPEDANCE
--------- DATA VALID - - --
ortg-T AND ROY HAVE 3m EXTERNAL PULL-UP RESISTOHS
Figure 2. AD7579/AD7580 Read Cycle Timing
REV. A
DBN DBN
3m 1DOpF 100pF
DGND g DGND
a. High-Z to Vo,, b. High-Z to VOL
Figure 3. Load Circuits for Access Time Tests (tn)
DGND $DGND
a. VOH to High-Z b. ' to High-Z
Figure 4. Load Circuits for Output Float Delay (tn)
DBN DBN
3en 10pF
3kn 3m
DBN DBN
100pF 10pF
g DGND DGND
a. High-Z to VOL b. VOL to High-Z
Figure 5. Load Circuit for W Propagation Delays
AD7579/A07580
ABSOLUTE MAXIMUM RATINGS'
VDD to AGND ................ -0BV to + 7V
Von t0 DGND ................ + 0.3V to + 7V
AGND to DGND ................ -0.3V, VDD
Digital Input Voltage to DGND
Digital Output Voltage to DGND
CLK Input Voltage to DGND
-0.3V, Vnn +0.3V
-OBV, VDD +0.3V
-0.3V, VDD +0.3V
VREF to AGND ................. - 0.3V, Vor,
Vo/ + )A, Vrrd + )B to AGND
(Figure 12) .............. -0.3V, vm, +0.3V
Vm( - )A, Vsrd - )B to AGND
(Figure 12) .............. - 0.3V, Vor, + 0.3V
Vrrd + )A to AGND (Figure 14) ..... - 0.6V, 2Voro + 0.6V
Vrrd - )A to AGND (Figure 14) ..... -0.6V, 2Voro +0.6V
Vod + )A to AGND
(Figure 15) ..... - VREF - 0.6V, ZVDD - VREF + 0.6V
CAUTION
Vrrd - )A to AGND
(Figure 15) ..... -VREF -0.6V, 2Voo -VREF +0.6V
Operating Temperature Range
Commercial (J, K Versions)
Industrial (A, B Versions)
.......... 0 to +70°C
- 25°C to + 85°C
Extended (S Version) ........... - 55°C to + 125°C
Storage Temperature Range ......... - 65°C to + 150°C
Lead Temperature (soldering, 10sec) ......... + 300°C
Power Dissipation (Any Package) to + 75°C 450mW
Derates Above + 75°C by ............... 6mW/°C
*Stress above those listed under "Absolute Maximum Ratings" may cause permanent
damage to the device. This is a stress rating only and functional operation of the device
at these or any other conditions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating conditions for ex-
tended periods may affect device reliability.
ESD (electrostatic discharge) sensitive device. The digital control inputs are diode protect-
ed; however, permanent damage may occur on unconnected devices subject to high energy
electrostatic fields. Unused devices must be stored in conductive foam or shunts. The protective
foam should be discharged to the destination socket before devices are removed.
TERMINOLOGY
LEAST SIGNIFICANT BIT (LSB)
An ADC with 10-bit resolution can resolve one part in 210
(1/ 1024 of full scale). For the AD7579/AD7580 operating in the
unipolar range with 2.5V span, one LSB is 2.44mV.
ZERO CODE ERROR
This is a measure of the difference between the ideal (0.5LSB)
and the actual differential analog input level required to produce
the first positive LSB code transition (00 . . . 00 to 00 . . . 01).
FULL-SCALE ERROR
The ideal difference between the first transition voltage and last
transition voltage for an ADC is (F.S. -2LSB). AD7579/AD7580
Full-Scale Error is defined as the deviation between this ideal
difference and the measured difference.
COMMON-MODE RANGE
The voltage at both inputs to the AD7579/AD7580 can be raised
above or lowered below analog ground potential, providing
VIN(+) is equal to or more positive than Wd-). Figures 12,
14, and 15 show circuits for various Analog Input Ranges. The
Common-Mode Range represents the voltage extremes which
can be applied to the circuits of Figure 12, 14 or 15. For example,
when the AD7579/AD7580 is connected as in Figure 1'5, the
Common-Mode Range is - 2.5V to + 7.5V.
SLEW RATE .
Slew Rate is the maximum allowable rate of change of input
signal such that the digital sample values are not in error. The
Slew Rate performance of AD7579/AD7580 allows sampling of
an input full-scale (2.5V pk-pk) sine wave up to 20kHz.
SIGNAL-TO-NOISE RATIO
Signal-to-Noise Ratio (SNR) is measured signal to noise at the
output of the ADC. The signal is the rms magnitude of the
fundamental. Noise is the rms sum of all nonfundamental signals
up to half the sampling frequency. SNR is dependent on the
number of quantization levels used in the digitization process;
the more levels, the smaller the quantization noise. The theoretical
SNR for a sine-wave input is given by:
SNR =(6.02N+ 1.76) dB,
where N is the number of bits in the ADC. Thus for an ideal
10-bit ADC, SNR=62dB.
INTERMODULATION DISTORTION
With inputs consisting of sine waves at two frequencies, fa and
fb, any active device with nonlinearities will create distortion
products, of order (m + n), at sum and difference frequencies of
mfat nfb, where m,n = 0,1,2,3,----. Intermodulation terms are
those for which m or n is not equal to zero.
HARMONIC DISTORTION
Harmonic distortion is the ratio of the square root of the sum-of-
the-squares of the rms values of the harmonics to the rms value
of the fundamental. For the AD7579/AD7580, Harmonic Dis-
tortion is:
20log \/(V22 + v + vd + V52 +V62) dB,
where V] is the rms amplitude of the fundamental and V2, Vs,
V4, Vs, Vs are the rms amplitudes of the individual harmonics.
REV. A
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