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AD7237KNN/a223avaiLC2MOS DUAL 12-BIT DACPORT
AD7237KNADN/a223avaiLC2MOS DUAL 12-BIT DACPORT
AD7247JNN/a276avaiLC2MOS DUAL 12-BIT DACPORT
AD7247JNADN/a42avaiLC2MOS DUAL 12-BIT DACPORT
AD7247JRADN/a97avaiLC2MOS DUAL 12-BIT DACPORT
AD7247KNADN/a67avaiLC2MOS DUAL 12-BIT DACPORT


AD7247JN ,LC2MOS DUAL 12-BIT DACPORT
AD7247JN ,LC2MOS DUAL 12-BIT DACPORT
AD7247JR ,LC2MOS DUAL 12-BIT DACPORT
AD7247KN ,LC2MOS DUAL 12-BIT DACPORT
AD7248A ,12-Bit DACPORT with Double-Buffered Byte LoadingCHARACTERISTICS (V = +12 V to +15 V; V = 0 V to –12 V to –15 V; See Figures 5 and 7.)DD SSParameter ..
AD7248AAN ,LC2MOS 12-Bit DACPORTsfeatures include extended temperature rangeDDoperation for commercial and industrial grades.The AD7 ..
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AD7237KN-AD7247JN-AD7247JR-AD7247KN
LC2MOS DUAL 12-BIT DACPORT
ANALOG
DEVICES
Dual 12-Bit DACPORT
M7237/h07247
FEATURES
Complete Dual 12-Bit DAC Comprising
Two 12-Bit CMOS DACs
On-Chip Voltage Reference
Output Amplifiers
Reference Buffer Amplifiers
Parallel Loading Structure: A0724
(8+4) Loading Structure: AD7237
Single or Dual Supply Operation
Low Power - 165 mW typ in Single Supply
GENERAL DESCRIPTION
Thc AD7237/AD7247 is a complcw, dual, 12-bit, voltage output
digital-to-analog converter with output amplifiers and chcr
voltage reference on a monolithic CMOS chip. No external user
trims are required to achieve full specified performance.
Both parts are microprocessor compatible, with high speed data
latches and interface logic, T he AD7247 accepts 12-bit parallel
data which is loaded into the respective DAC latch using the
VT’R input and a separate Chip Select input for each DAC. The
AD7237 has a double buffered interface structure and an 8-bit
wide data bus with data loaded to the respective input latch in
two write operations. An asynchronous LDAE signal on the
AD7237 updates the DAC latches and analog outputs.
A REF OUT/REF IN function is provided which allows either
the on-chip 5 V reference or an external reference to be used.as
a reference voltage for the part. For single supply operation, two
output ranges of 0 to +5 V and i) to +10 V are available, while
these two ranges plus an additional t5 V range are available
with dual supplies. The output amplifiers are capable of devel-
oping A 10 V across a 2 k!) load to GND.
The AD7237(AD7247 is fabricated in Linear Compatible CMOS
(LCIMOS), an advanced, mixed technology process that com-
bines precision bipolar circuits with low power CMOS logic.
Both parts are available in a 24-pin, 0.3" wide plastic and her.
metic dual-in-line package (DIP) and are also packaged in a 24-
lead small outline (SOIC) package.
DACPORT is a trademark of Analog Devices, Inc.
REV. A
Information fu rmshed by Analog Devices is believed to be accurate and
reliable, Howeven no responsibility is assumed by Analog Devices for its
use. nor for any infringements of patents or other rights of third pa rties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
FUNCTIONAL BLOCK DIAGRAMS
. CONTROL
DGND aano Vs,,
mm uss
PRODUCT HIGHLIGHTS
1. The AD7237/AD7247 is a dual lvaiI DACPORTTM on a
single chip. This single chip design and small package size
offer considerable space saving and increased reliability over
multichip designs.
2. Between them, the AD7237 and AD7247 offer a versatile
interface arrangement to either 8-bit or 16-bit data bus
structures.
One Technology Way, PO. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel; 517/3294700 Fax; 617/326-8703 wa: 710l3iW6577
Telex: 924491 Cable: ANALOG NORWOODMASS
A07237/AD7247 ---R- SPEiyFlChTl0lG (lea-tUte/ti-grit/ip...,,,,,';,;)), E11103 ll,
ilr = 2 119,01 L..-.. IN pf. All specifications Tmin to u, unless otherwise noted.)
Parameter J, A, S2 K, B, T 1 Units 1 Test conditions/Comments
STATIC PERFORMANCE
Resolution 12 12 Bits
Relative Accuracy" tcl tll LSB max
Differential Nonlinearity' t:0.9 20.9 LSB max V Guaranteed Monotonic
Unipolar Offset Error' :3 t3 LSB max Vss = 0 V or - 15 V. DAC Latch Contents All Os
Bipolar Zero Errors tr4 t4 LSB max Vss = - 15 V. DAC Latch Contents
1000 0000 0000
Full-Scale Errorr 4 +5 :5 LSB max
FulI-Scaie Mismatch" tcl :1 LSB typ
REFERENCE OUTPUT
REF OUT
J, K, A, B Versions 4,97/5.03 4.97/5.03 Vmin/Vmax
S, T Versions 495/505 49515.05 Vmin/Vmax
Reference Temperature Coefficient :25 :25 pprr/C typ
Reference Load Change
(AREF OUT vs, AI) ~- 1 -l mV max Reference Load Current Change {0-100 WA)
REFERENCE INPUT
Reference Input Range 4,95/5.05 435/505 V min/V max 5 V r 1%
Inpur Currents t5 st5 " max
DIGITAL INPUTS
Input High Voltage, Vle 2.4 2.4 V min
Input Low Voltage, Von. 0.8 0.8 V max
Input Current .
Its. (Data Inputs) :10 210 wA max VIN T' 0 V to Vor)
hss (Control Inputs)" ct10 tii) " max Vm = V,,,,
IXNL (Control Inputs)" - 150 -15() WA max Vm. = fl V
Input Capacitance'' 16 16 pF max
ANALOG OUTPUTS
Output Range Rcsxstors 15/30 15/30 H) mia/Mt max
Output Voltage Ranges _ e-5, +10 +5, +10 V Vss ' 0 V. Pin Strappable
Output Voltage Ranges ' +5, , 10, +5, e-lo, 1
f5 t5 V Vss = -.15 V. Pin Strappable
DC Output Impedance 0.5 0.5 n typ
AC CHARACTERISTICS'
Voltage Output Settling Time Settling Time to Within T. V LSB of F inal Value
Full.Scafe Change IG, = +15 V, Vss, = 15 V
J, K, A, B Versions 10 10 us max
s, T Versions 12 12 us max
Digital-to-Analog Gluch Impulse3 30 30 nV secs typ
Digital Feedthrough“ 10 10 nV secs typ
Digital Crosstalk3 Jo 30 nV secs Typ
POWER REQUIREM ENTS
Vno +15 +15 V mm ;5% for Specified Performance Unless Otherwise Stated
Vss _ 15 --15 V mm 75% for Specified Performance Unless Otherwise Stated
lm, 15 15 mA max Output Unloaded.Typica11y 11 mA
Iss (Dual Supplies) 5 5 mA max Output Unloaded.Typically 3 mA
'Parts are functional at su, = + l V t10% and Vs, = 0 V or - l V f10%. See typical performance graphs.
'Tempcrature rangcs are " follows: J, K Versions, 40'C to -r85'C; A, B Versions, 40"C m 4 85T; S, T Versmns, --55''C, to "r125'C.
' Terminology.
'Measured with respect to REF iN and includes unipolarmipour offsct error.
'Sample tested (y +253C m qtsyt.iyynpliiyEt. -- - W
“Comm! inputs are AO, Al, cs, WR and LDAC for the AD7237 and CSA, CSB and WR for the AD7247.
Specifications subject [0 change without notice.
-2- REV.A
h07237/M7247
TIMING CHARACTERISTICS" 2
+15 ll 35%; Ilss = il y or --15 ll 15%. MO '=.' 06111] = il ll [ADZ37}.
tl ll {A11724711
Limit at TU,, TN Limit at Tm", Tm 1 1
Parameter (J, K, A, B Versions) (S, T Versions) Units 1 Conditions/Comments
t, O 0 ns min l C';" to WK Setup Time
ts, 0 0 ns min i,' E to TiTii Hold Time
ts 130 150 3 ns min 'ii, "tTift" Pulse Width
La LN 150 l ns min "i'., Data Valid to WI Setup Time
ty.3 m 15 l ns min I Data Valid to WI Hold Time
ts" 0 0 'I: ns min i Address to WK Setup Time
17‘ 0 0 E ns min Address to -irt' Hold Time
t," 100 loo 1 ns min 1 Lrire Pulse Width
NUl'l-ZS
'Sample tested at ' JVC to ensure comp1iancc. All input signals are specified with tr _ d' - 5 ns (10% to 90% of.5 V;
and timed from a voltage level of 1.6 V,
' Figures 5 and 7.
'if0 nr'l< 10 us, add I: uots.lfrr-l0 us. add 10 us to 15.
411137237 only.
ABSOLUTE MAXIMUM RATINGS'
iT, = '2VC unless otherwise noted;
Vc,,, to GND (AD7247) .............. -0.3 V to .217 v
Vor, to AGND, DGND (AD7237) ....... --0.3 V to - 17 V
Vor, to Vss _..r.-.'.._..TV --(h3 V10 +34 v
AGND t0 DGND (AD7237) ..._....
Vern); vo.rt,' to AGND (GND)
..................... Vss --0.3 V m Vo,, +0.5 V
REF OUT to AGND (GND) .............. 0 v to Vor,
REF IN to AGND (GND) ........ -0.3 V to Vor, +0.3 V
Digital Inputs to DGND (GND) ' --0.3 V to VDD +0.3 V
Operating Temperature Range
no.3 v , Vor, +0.3 V
Commercial (l, K Versions) ........... -4WC to -85'C
Industrial (A, B Versions) ............ -40'C to +85°C
Extended (S, T Versions) ............ -55'C to . 125°C
Storage Temperature Range ........... 65°C to f 1509C
Lead Temperature (Soldering, 10 secs) ........... +300°C
Power Dissipation (Any Package) to +75°C ....... 1000 mW
Derates above +7S°C by .................. ii) mW/°C
'.%orrcircuit currem 15 typicallv MhnA, The outputs may be shorted to
voltages in this range provided the power dissipation of the package is not
exceeded.
*Stresscs above those listed under "Absolute Maximum Ratings" may cause
permanent damage m the device, This is a slrcss rating only and functional
operatiun of the device at these or any other conditions above those listed in the
operational sections of this speciGcatiomis nor implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability,
CAUTION
ORDERING GUIDE
Relative
Temperature Accuracy Package
Modef Range (LSB) Option:
AD7237JN -40'C to +8YC tl max N-24
AD7237KN -40'C to +85"C t l/2 max N-24
AD7237JR -40t to +85°C 'l max R-24
AD7237KR 40°C to i SST -e 1/2 max R-24
AD7237AQ -40'C to t85oC. "rl max Q-24
AD7237BQ -40oC to +85°C :1/2 max Q-24
AD7237SQ 55°C to +125°C :1 max Q-24
AD7237TQ VV 55°C 10 +125°C : 1/2 max Q-24
AD72471N - 40°C to +gVC. Lt 1 max N-24
AD7247KN -40T to "-85''C ' :1/2 max N-24
AD7247JR -40'C to 435°C E :1 max 11-24
ADTZ47KR --40°C to +85°C _ 11/2 max R-24
AD7247AQ 40‘3C to +85°C tl max Q-24
AD7 47BQ -40oC t0 +85"C +112 max Q-24
AD 247SQ 755“C to +125°C 11 max Q-24
AD7247TQ .-55oC to +125°C ‘. tl/2 max Q-24
'To urdar MlL-STD-883, Class B processed pans, add /883B to part num-
ber. Contact itrcal sales oftice for military data sheet and availability.
'N = Plastic D1P;Q = Cerdip; R = Small Outlmc :SOIC).
ESD (electrostatic discharge) sensitive device. The digital control inputs are diode protected;
however, permanent damage may occur on unconnected devices subject to high energy electro,
static fields. Unused devices must be stored in conductive foam 0r shunts. The protective foam
should be discharged to the destination socket before devices are inserted.
REV. A
E50 SENSITWE DEVICE
M7237/li0724
AD7237 PIN FUNCTION DESCRIPTION (DIP PIN NUMBERS)
Pin Mnenionic Descripiion
1 REF INA Voltage Reference Input for DAC A. The reference voltage for DAC A is applied to this pin. It is internally
buffered before being applied to the DAC. The nominal reference voltage for correct operation of the AD7237
is 5 V.
2 REF OUT Voltage Reference Output. The internal 5 V analog reference is provided at this pin. To operate the part with
internal reference, REF OUT should be connected to REF INA, REF INB.
3 REF LNB Voltage Reference Input for DAC B. The reference voltage for DAC B is applied to this pin, It is internally
buffered before being applied to the DAC. The nominal reference voltage for correct operation of the AD7237
is 5 V.
4 Runs Output Offset Resistor for DAC B. This input configures the output ranges for DAC B. It is connected to
Vows for the +5 V range, to AGND for the _ 10 V range and to REF INB for the :5 V range,
5 erm Analog Output Voltage from DAC B. This is the buffer amplifier output voltage, Three different output
voltage ranges can be chosen: 0 to +5 V, 0 to + 10 V and i5 V. The amplitier is capable of developing +10 V
across a 2 k0. resistor to GND.
6 AGN D Analog Ground. Ground reference for DACs, reference and output buffer amplifiers.
7 DB7 Data Bit 7.
8-10 DB6-DB4 Data Bit 6 to Data Bit 4.
11 DB3 Data Bit 3/Data Bit 11 (MSB).
l. DGN D Digital Ground, Ground reference for digital circuitry.
13 DB Data Bit 2/Data Bit 10.
14 DBI Data Bit l/Data Bit 9,
15 DB0 Data Bit 0 (LSB)/Data Bit 8.
I6 A0 Address Input. Least significant address input for input latches. A0 and A1 select which of the four input
latches data is written to (see Table II).
17 Al Address Input. Most significant address input for input latches.
18 (Ti';' Chip Select. Active low logic input. The device is selected when this input is active.
19 Wrri Write Input. WE is an active low logic input which is used in conjunction with cs, A0 and Al to write data
to the input latches.
20 LDAC Load DAC. Logic input. A new word is loaded into the DAC latches from the respective input latches on the
falling edge of this signal.
2l Vm, Positive Supply, +15 V.
22 mem Analog Output Voltage from DAC A. This is the buffer amplifier output voltage. Three different output
voltage ranges can be chosen: 0 to +5 V, 0 to +10 V and :5 V. The amplifier is capable of developing - 10 V
across a 2 Mt resistor to GND.
23 VSS Negative Supply, -15 V.
24 Rors, Output Offset Resistor for DAC. A. This input configures the output ranges for DAC A. It is connected to
qum for the +5 V range, to AGND for the . 10 V range and to REF INA for the t5 V range.
-4- REV, A
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