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AD645JNADN/a3avaiLow Noise, Low Drift FET Op Amp


AD645JN ,Low Noise, Low Drift FET Op AmpSPECIFICATIONSModel AD645J/A AD645K/B AD645C AD645S1Conditions Min Typ MaxMin Typ Max Min Typ Max M ..
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AD645JN
Low Noise, Low Drift FET Op Amp
REV.BLow Noise, Low Drift
FET Op Amp
FEATURES
Improved Replacement for Burr-Brown
OPA-111 and OPA-121 Op Amp
LOW NOISE
2 mV p-p max, 0.1 Hz to 10 Hz
10 nV/√Hz max at 10 kHz
11 fA p-p Current Noise 0.1 Hz to 10 Hz
HIGH DC ACCURACY
250 mV max Offset Voltage
1 mV/8C max Drift
1.5 pA max Input Bias Current
114 dB Open-Loop Gain
Available in Plastic Mini-DIP, 8-Pin Header Packages, or
Chip Form
APPLICATIONS
Low Noise Photodiode Preamps
CT Scanners
Precision I-V Converters
PRODUCT DESCRIPTION

The AD645 is a low noise, precision FET input op amp. It of-
fers the pico amp level input currents of a FET input device
coupled with offset drift and input voltage noise comparable to a
high performance bipolar input amplifier.
The AD645 has been improved to offer the lowest offset drift in
a FET op amp, 1μV/°C.Offset voltage drift is measured and
trimmed at wafer level for the lowest cost possible. An inher-
ently low noise architecture and advanced manufacturing tech-
niques result in a device with a guaranteed low input voltage
noise of 2μV p-p, 0.1 Hz to 10 Hz. This level of dc performance
along with low input currents make the AD645 an excellent
choice for high impedance applications where stability is of
prime concern.
10k1k110100
VOLTAGE NOISE SPECTRAL DENSITY
nV/ Hz
FREQUENCY – Hz

Figure 1.AD645 Voltage Noise Spectral Density vs.
Frequency
CONNECTION DIAGRAMS
TO-99 (H) Package8-Pin Plastic Mini-DIP
IMPROVEDDRIFT

The AD645 is available in six performance grades. The AD645J
and AD645K are rated over the commercial temperature range
of 0°C to +70°C. The AD645A, AD645B, and the ultra-
precision AD645C are rated over the industrial temperature
range of –40°C to +85°C. The AD645S is rated over the military
temperature range of –55°C to +125°C and is available
processed to MIL-STD-883B.
The AD645 is available in an 8-pin plastic mini-DIP, 8-pin
header, or in die form.
PRODUCT HIGHLIGHTS

AD645–SPECIFICATIONS
INPUT VOLTAGE NOISE
FREQUENCY RESPONSE
SETTLING TIME
INPUT IMPEDANCE
NOTESInput offset voltage specifications are guaranteed after 5 minutes of operation at TA = +25°C.Bias current specifications are guaranteed maximum at either input after 5 minutes of operation at TA = +25°C. For higher temperature, the current doubles every 10°C.
(@ +258C, and 615 V dc, unless otherwise noted)

AD645–Typical Characteristics (@ +258C, 615 V unless otherwise noted)
CURRENT NOISE SPECTRAL DENSITY – fA/

1001k10k100k
FREQUENCY – Hz1M
0.1

Figure 7.Current Noise Spectral
Density vs. Frequency
Figure 10.Input Voltage Noise vs.
Source Resistance
Figure 13.Change in Input Offset
Voltage vs. Warmup Time
100101001k10k100k
FREQUENCY – Hz
VOLTAGE NOISE SPECTRAL DENSITY – nV/ Hz

Figure 8.Voltage Noise Spectral
Density vs. Frequency
Figure 11.Voltage and Current
Noise Spectral Density vs.
Temperature
Figure 14.Change in Input Offset
Voltage vs. Time from Thermal
Shock
Figure 9.Voltage Noise Spectral
Density vs. Frequency for Various
Source Resistances
Figure 16.Input Bias Current vs.
Common-Mode Voltage50510
COMMON-MODE REJECTION – dB
COMMON MODE VOLTAGE – Volts15
120–

Figure 19.Common-Mode
Rejection vs. Input Common-Mode
Voltage
RAT
E –
Vo
lts
/µs
2.0G
-BANDW
PRO
DUCT
SUPPLY VOLTAGE – ±Volts5101520

Figure 22.Gain-Bandwidth and
Slew Rate vs. Supply Voltage
1001k10k100k
FREQUENCY – Hz10M
POWER SUPPLY REJECTION – dB
1201

Figure 17.Power Supply Rejection
vs. Frequency
1001k10k100k
FREQUENCY – Hz10M
OOP
GA
PHASE SHI
De
180–

Figure 20.Open-Loop Gain and
Phase Shift vs. Frequency
Figure 23.Open-Loop Gain vs.
Temperature
Figure 18.Common-Mode
Rejection vs. Frequency
AD645
SETTLING TIME – µs
OUTPUT SWING FROM 0V TO ±VOLTS

Figure 25.Output Swing and Error
vs. Settling Time
2kΩ
10pF–
VIN3

Figure 28a.Unity-Gain Follower
2kΩ
10pF–0.1µF3
VIN
5kΩ
5kΩ

Figure 29a.Unity-Gain Inverter
SETTLING TIME – µs
CLOSED-LOOP VOLTAGE GAIN (V/V)1001k1

Figure 26.Settling Time vs. Closed-
Loop Voltage Gain
Figure 28b.Unity-Gain Follower
Large Signal Pulse Response
Figure 29b.Unity-Gain Inverter
Large Signal Pulse Response
1
2
3
4
SUPPLY CURRENT – mA
TEMPERATURE – 8C

Figure 27.Supply Current vs.
Temperature
Figure 28c.Unity-Gain Follower
Small Signal Pulse Response
Figure 29c.Unity-Gain Inverter
Small Signal Pulse Response
AD645–Typical Characteristics
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