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AD5243BRM100ADN/a1avai256-Position Dual Channel I2C Compatible Digital Potentiometer
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AD5243BRM100-AD5243BRM2.5
256-Position Dual Channel I2C Compatible Digital Potentiometer
Dual 256-Position I2C Compatible
Digital Potentiometer

Rev. 0
FEATURES
2-channel, 256-position
End-to-end resistance: 2.5 kΩ, 10 kΩ, 50 kΩ, and 100 kΩ
Compact MSOP-10 (3 mm × 4.9 mm) package
Fast settling time: tS = 5 µs typ on power-up
Full read/write of wiper register
Power-on preset to midscale
Extra package address decode pins AD0 and AD1 (AD5248
only)
Computer software replaces µC in factory programming
applications
Single supply: 2.7 V to 5.5 V
Low temperature coefficient: 35 ppm/°C
Low power: IDD = 6 µA max
Wide operating temperature: −40°C to +125°C
Evaluation board available
APPLICATIONS
Systems calibrations
Electronics level settings
Mechanical Trimmers® replacement in new designs
Permanent factory PCB setting
Transducer adjustment of pressure, temperature, position,
chemical, and optical sensors
RF amplifier biasing
Automotive electronics adjustment
Gain control and offset adjustment
FUNCTIONAL BLOCK DIAGRAMS
VDD
SDA
SCL

04109-0-001A2W2
Figure 1. AD5243
VDD
GND
SDA
SCL
AD0
AD1W2

04109-0-002
Figure 2. AD5248
GENERAL DESCRIPTION

The AD5243 and AD5248 provide a compact 3 mm × 4.9 mm
packaged solution for dual 256-position adjustment applica-
tions. These devices perform the same electronic adjustment
function as a 3-terminal mechanical potentiometer (AD5243)
or a 2-terminal variable resistor (AD5248). Available in four
different end-to-end resistance values (2.5 kΩ, 10 kΩ, 50 kΩ,
and 100 kΩ), these low temperature coefficient devices are ideal
for high accuracy and stability variable resistance adjustments.
The wiper settings are controllable through the I2C compatible
digital interface. The AD5248 has extra package address decode
pins AD0 and AD1, allowing multiple parts to share the same 2C 2-wire bus on a PCB. The resistance between the wiper and
either endpoint of the fixed resistor varies linearly with respect
to the digital code transferred into the RDAC latch.1
Operating from a 2.7 V to 5.5 V power supply and consuming
less than 6 µA allows for usage in portable battery-operated
applications.
For applications that program the AD5243/AD5258 at the
factory, Analog Devices offers device programming software
running on Windows® NT/2000/XP operating systems. This
software effectively replaces any external I2C controllers, which
in turn enhances users’ systems time-to-market. An AD5243/
AD5248 evaluation kit and software are available. The kit
includes a cable and instruction manual.
1The terms digital potentiometer, VR, and RDAC are used interchangeably.
TABLE OF CONTENTS
Electrical Characteristics—2.5 kΩ Version...................................3
Electrical Characteristics—10 kΩ, 50 kΩ, 100 kΩ Versions.......4
Timing Characteristics—All Versions...........................................5
Absolute Maximum Ratings............................................................6
ESD Caution..................................................................................6
Pin Configurations and Function Descriptions...........................7
Typical Performance Characteristics.............................................8
Test Circuits.....................................................................................12
Theory of Operation......................................................................13
Programming the Variable Resistor and Voltage....................13
Programming the Potentiometer Divider...............................14
ESD Protection...........................................................................14
Terminal Voltage Operating Range..........................................14
Power-Up Sequence...................................................................14
Layout and Power Supply Bypassing.......................................14
Constant Bias to Retain Resistance Setting.............................15
Evaluation Board........................................................................15 2C Interface....................................................................................16 2C Compatible 2-Wire Serial Bus...........................................16
Outline Dimensions.......................................................................19
Ordering Guide..........................................................................19
REVISION HISTORY

Revision 0: Initial Version
ELECTRICAL CHARACTERISTICS—2.5 kΩ VERSION
VDD = 5 V ± 10%, or 3 V ± 10%; VA = +VDD; VB = 0 V; −40°C < TA < +125°C; unless otherwise noted.
Table 1.

See notes at end of section.
ELECTRICAL CHARACTERISTICS—10 kΩ, 50 kΩ, 100 kΩ VERSIONS
VDD = 5 V ± 10%, or 3 V ± 10%; VA = VDD; VB = 0 V; −40°C < TA < 125°C; unless otherwise noted.
Table 2.

See notes at end of section.
TIMING CHARACTERISTICS—ALL VERSIONS
VDD = 5V ± 10%, or 3V ± 10%; VA = VDD; VB = 0 V; −40°C < TA < +125°C; unless otherwise noted.
Table 3.

See notes at end of section.
NOTES

1 Typical specifications represent average readings at 25°C and VDD = 5 V. Resistor position nonlinearity error R-INL is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper
positions. R-DNL measures the relative step change from ideal between successive tap positions. Parts are guaranteed monotonic. VAB = VDD, wiper (VW) = no connect.
4 INL and DNL are measured at VW with the RDAC configured as a potentiometer divider similar to a voltage output D/A converter. VA = VDD and VB = 0 V.
DNL specification limits of ±1 LSB maximum are guaranteed monotonic operating conditions.
5 Resistor terminals A, B, W have no limitations on polarity with respect to each other. Guaranteed by design and not subject to production test.
7 Measured at the A terminal. The A terminal is open circuited in shutdown mode. PDISS is calculated from (IDD × VDD). CMOS logic level inputs result in minimum power dissipation.
9All dynamic characteristics use VDD = 5 V. See timing diagrams for locations of measured values.
11The maximum tHD:DAT must be met only if the device does not stretch the low period (tLOW) of the SCL signal.
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