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74VHCT373STN/a50avaiOctal D-Type Latch with TRI-STATE Outputs
74VHCT373NSN/a13368avaiOctal D-Type Latch with TRI-STATE Outputs


74VHCT373 ,Octal D-Type Latch with TRI-STATE Outputs74VHC373 74VHCT373OctalD-TypeLatchwithTRI-STATEOutputs#November199574VHC373 74VHCT373#OctalD-TypeLa ..
74VHCT373 ,Octal D-Type Latch with TRI-STATE Outputs74VHC373 74VHCT373OctalD-TypeLatchwithTRI-STATEOutputs#November199574VHC373 74VHCT373#OctalD-TypeLa ..
74VHCT373A ,OCTAL D-TYPE LATCH WITH 3 STATE OUTPUT NON INVERTING
74VHCT373AMTC ,Octal D-Type Latch with 3-STATE OutputsFeaturesing the CMOS low power dissipation. This 8-bit D-typelatch is controlled by a latch enable ..
74VHCT373AMTCX ,Octal D-Type Latch with 3-STATE Outputs74VHCT373A Octal D-Type Latch with 3-STATE OutputsJuly 1997Revised April 199974VHCT373AOctal D-Type ..
74VHCT373AMX ,Octal D-Type Latch with 3-STATE OutputsFunctional Description Truth TableThe VHCT373A contains eight D-type latches with 3-Inputs OutputsS ..
892NCF-101M , Fixed Inductors for Surface Mounting


74VHCT373
Octal D-Type Latch with TRI-STATE Outputs
TL/F/11555
74VHC373
74VHCT373
Octal
D-Type
Latch
with
TRI-STATE
Outputs
November 1995
74VHC373# 74VHCT373
Octal D-Type Latch with TRI-STATEÉ Outputs
General Description
The VHC/VHCT373isan advancedhigh speed CMOSoctal
D-type latch with TRI-STATE output fabricated with silicon
gate CMOS technology.It achievesthe high speed opera-
tion similarto equivalent Bipolar Schottky TTL while main-
tainingthe CMOSlow power dissipation. This 8-bit D-type
latchis controlledbya latch enable input (LE)andan output
enable input (OE). The latches appear transparentto data
when latch enable (LE)is HIGH. WhenLEis low,the data
that meetsthe setup timeis latched. WhentheOE inputis
high,the eight outputsareina high impedance state. input protection circuit ensures that 0V–7Vcanbeap-
pliedtothe input pins without regardtothe supply voltage.
This devicecanbe usedto interface5Vto3V systemsand
two supply systems suchas battery backup. This circuit
prevents device destructiondueto mismatched supplyand
input voltages.
Features High Noise Immunity:
VHC VNIHe VNILe 28% VCC (Min)
VHCTVIHe 2.0V,VILe 0.8V Power Down Protection:
VHC Inputs Only
VHCT Inputsand Outputs Low Noise:
VHC VOLPe 0.6V (typ)
VHCT VOLPe 0.8V (typ) Low Power Dissipation:
ICCe4mA (Max)@Tae 25§C Balanced Propagation Delays: tPLHj tPHLPinand Function Compatible with 74HC/HCT373
Commercial Package Package DescriptionNumber
74VHC373M M20B 20-Lead MoldedJEDECSOIC
74VHC373SJ M20D 20-Lead MoldedEIAJSOIC
74VHC373MSC MSC20 20-Lead MoldedEIAJType1 SSOP
74VHC373MTC MTC20 20-Lead MoldedJEDECType1TSSOP
74VHC373N N20A 20-Lead MoldedDIP
74VHCT373M M20B 20-Lead MoldedJEDECSOIC
74VHCT373SJ M20D 20-Lead MoldedEIAJSOIC
74VHCT373MTC MTC20 20-Lead MoldedJEDECType1TSSOP
74VHCT373N N20A 20-Lead MoldedDIP
Note:Surface mountpackagesare alsoavailableonTape andReel.Specify byappendingthesuffixletter
‘‘X’’tothe ordering code.EIAJType 1SSOP availableonTapeandReelonly, order MSCX.
Logic Symbol
IEEE/IEC
TL/F/11555–1
Connection Diagram
Pin Assignmentfor
DIP, SSOP, TSSOPand SOIC
TL/F/11555–2
Pin Names Description
D0–D7 Data Inputs Latch Enable Input Output Enable Input
O0–O7 TRI-STATE Outputs
TRI-STATEÉ isaregistered trademarkof National SemiconductorCorporation.
C1995National SemiconductorCorporation RRD-B30M125/PrintedinU.S.A.
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