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74VHC175M-74VHC175MTC-74VHC175MTCX-74VHC175N-74VHC175SJ Fast Delivery,Good Price
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Partno Mfg Dc Qty AvailableDescript
74VHC175MFAIRCHILN/a103avaiQuad D-Type Flip-Flop
74VHC175MTCFN/a8756avaiQuad D-Type Flip-Flop
74VHC175MTCXFAIN/a2502avaiQuad D-Type Flip-Flop
74VHC175NFAIN/a7500avaiQuad D-Type Flip-Flop
74VHC175SJFAIRCHILN/a15avaiQuad D-Type Flip-Flop


74VHC175MTC ,Quad D-Type Flip-FlopFunctional Description Truth TableThe VHC175 consists of four edge-triggered D flip-flopsInputs Out ..
74VHC175MTCX ,Quad D-Type Flip-FlopGeneral Descriptionand two supply systems such as battery backup. This cir-The VHC175 is an advance ..
74VHC175N ,Quad D-Type Flip-FlopGeneral Descriptionand two supply systems such as battery backup. This cir-The VHC175 is an advance ..
74VHC175SJ ,Quad D-Type Flip-FlopFunctional Description Truth TableThe VHC175 consists of four edge-triggered D flip-flopsInputs Out ..
74VHC221A ,Dual Non-Retriggerable Monostable Multivibrator
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74VHC175M-74VHC175MTC-74VHC175MTCX-74VHC175N-74VHC175SJ
Quad D-Type Flip-Flop
74VHC175 Quad D-Type Flip-Flop August 1993 Revised April 1999 74VHC175 Quad D-Type Flip-Flop age. This device can be used to interface 5V to 3V systems General Description and two supply systems such as battery backup. This cir- The VHC175 is an advanced high-speed CMOS device cuit prevents device destruction due to mismatched supply fabricated with silicon gate CMOS technology. It achieves and input voltages. the high-speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissi- Features pation. � High Speed: f = 210 MHz (typ) at V = 5V The VHC175 is a high-speed quad D-type flip-flop. The MAX CC device is useful for general flip-flop requirements where � Low power dissipation: I = 4 μA (max) at T = 25°C CC A clock and clear inputs are common. The information on the � High noise immunity: V = V = 28% V (min) NIH NIL CC D inputs is stored during the LOW-to-HIGH clock transition. � Power down protection is provided on all inputs Both true and complemented outputs of each flip-flop are provided. A Master Reset input resets all flip-flops, inde- � Low noise: V = 0.8V (max) OLP pendent of the Clock or D inputs, when LOW. � Pin and function compatible with 74HC175 An input protection circuit insures that 0V to 7V can be applied to the input pins without regard to the supply volt- Ordering Code: Order Number Package Number Package Description 74VHC175M M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow 74VHC175SJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74VHC175MTC MTC16 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74VHC175N N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Pin Descriptions Pin Names Description D –D Data Inputs 0 3 CP Clock Pulse Input MR Master Reset Input Q –Q True Outputs 0 3 Q –Q Complement Outputs 0 3 Logic Symbols IEEE/IEC © 1999 DS011637.prf
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