IC Phoenix
 
Home ›  7728 > 74VHC161284MEA-74VHC161284MEAX-74VHC161284MTD-74VHC161284MTDX,IEEE 161284 Transceiver
74VHC161284MEA-74VHC161284MEAX-74VHC161284MTD-74VHC161284MTDX Fast Delivery,Good Price
Part Number:
If you need More Quantity or Better Price,Welcom Any inquiry.
We available via phone +865332716050 Email
Partno Mfg Dc Qty AvailableDescript
74VHC161284MEAFSCN/a1257avaiIEEE 161284 Transceiver
74VHC161284MEAXFAIN/a9667avaiIEEE 161284 Transceiver
74VHC161284MTDFAIN/a5400avaiIEEE 161284 Transceiver
74VHC161284MTDFAIRCHILDN/a494avaiIEEE 161284 Transceiver
74VHC161284MTDFSCN/a304avaiIEEE 161284 Transceiver
74VHC161284MTDXFAIN/a6300avaiIEEE 161284 Transceiver


74VHC161284MEAX ,IEEE 161284 TransceiverFeaturesThe VHC161284 contains eight bidirectional data buffers

74VHC161284MEA-74VHC161284MEAX-74VHC161284MTD-74VHC161284MTDX
IEEE 161284 Transceiver
74VHC161284 IEEE 1284 Transceiver February 1998 Revised November 2000 74VHC161284 IEEE 1284 Transceiver General Description Features The VHC161284 contains eight bidirectional data buffersSupports IEEE 1284 Level 1 and Level 2 signaling and eleven control/status buffers to implement a full standards for bidirectional parallel communications IEEE 1284 compliant interface. The device supports the between personal computers and printing peripherals IEEE1284 standard and is intended to be used inReplaces the function of two (2) 74ACT1284 devices Extended Capabilities Port mode (ECP). The pinout allows All inputs have hysteresis to provide noise margin for easy connection from the Peripheral (A-side) to the B and Y output resistance optimized to drive external Host (cable side). cable Outputs on the cable side can be configured to be either B and Y outputs in high impedance mode during power open drain or high drive (± 14 mA). The pull-up and pull- down down series termination resistance of these outputs on the Inputs and outputs on cable side have internal pull-up cable side is optimized to drive an external cable. In addi- tion, all inputs (except HLH) and outputs on the cable side resistors contain internal pull-up resistors connected to the V sup-Flow-through pin configuration allows easy interface CC ply to provide proper termination and pull-ups for open between the Peripheral and Host drain mode. Outputs on the Peripheral side are standard LOW-drive CMOS outputs. The DIR input controls data flow on the A –A /B –B transceiver pins. 1 8 1 8 Ordering Code: Ordering Number Package Number Package Description 74VHC161284MEA MS48A 48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300 Wide 74VHC161284MTD MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbol Connection Diagram © 2000 DS500098
ic,good price


TEL:86-533-2716050      FAX:86-533-2716790
   

©2020 IC PHOENIX CO.,LIMITED