74VHC161 ,Synchronous Presettable Binary Counter74VHC161SynchronousPresettableBinaryCounterOctober199574VHC161SynchronousPresettableBinaryCountersu ..
74VHC161284 ,IEEE 1284 TransceiverFeaturesThe VHC161284 contains eight bidirectional data buffers
74VHC161
Synchronous Presettable Binary Counter
TL/F/11635
74VHC161
Synchronous
Presettable
Binary
Counter
October 1995
74VHC161
Synchronous Presettable Binary Counter
General Description
The VHC161isan advanced high-speed CMOS devicefab-
ricated with silicon gate CMOS technology.It achievesthe
high-speed operation similarto equivalent Bipolar Schottky
TTLwhile maintainingthe CMOSlow power dissipation.The
VHC161isa high-speed synchronous modulo-16 binary
counter. This deviceis synchronously presettablefor appli-
cationin programmable dividers and have two typesof
Count Enable inputsplusa Terminal Countoutputfor versa-
tilityin forming synchronous multistage counters. The
VHC161 hasan asynchronous Master Reset input that
overridesall other inputsand forcesthe outputs LOW.An
input protection circuit insuresthat0Vto7Vcanbe appliedthe input pins without regardtothe supply voltage. This
devicecanbe usedto interface5Vto3V systemsandtwo
supply systems suchas battery backup. This circuit pre-
vents device destructiondueto mismatched supplyandin-
put voltages.
Features Synchronous countingand loading High-speed synchronous expansion Low power dissipation:
ICCe4mA (max)atTAe 25§C High noise immunity: VNIHe VNILe 28% VCC (min)All inputsare equipped witha power down protection
function Balanced propagation delays: tPLHj tPHL Low noise: VOLPe 0.8V (max)Pinand function compatible with 74HC161
Commercial PackageNumber PackageDescription
74VHC161M M16A 16-Lead MoldedJEDECSOIC
74VHC161SJ M16D 16-Lead MoldedEIAJSOIC
74VHC161MSC MSC16 16-Lead MoldedEIAJType1 SSOP
74VHC161MTC MTC16 16-Lead MoldedJEDECType 1TSSOP
74VHC161N N16E 16-Lead MoldedDIP
Note: Surface mount packagesarealso availableon TapeandReel. Specifyby appendingthe suffixletter‘‘X’’to theorderingcode.
EIAJType1 SSOP availableon TapeandReelonly, order MSCX.
Logic Symbols
TL/F/11635–1
IEEE/IEC
TL/F/11635–2
Connection Diagram
PinAssignmentfor
DIP,SSOP, TSSOPand SOIC
TL/F/11635–3
PinNames Description
CEP CountEnableParallelInput
CET CountEnableTrickleInput ClockPulseInput AsynchronousMaster ResetInput
P0–P3 Parallel DataInputs Parallel EnableInputs
Q0–Q3 Flip-Flop Outputs Terminal Count Output
C1995National SemiconductorCorporation RRD-B30M125/PrintedinU.S.A.
