74VCX16374TTR ,LOW VOLTAGE 16-BIT D-TYPE FLIP FLOP (3-STATE) WITH 3.6V TOLERANT INPUTS AND OUTPUTS74VCX16374LOW VOLTAGE CMOS 16-BIT D-TYPE FLIP-FLOP (3-STATE)WITH 3.6V TOLERANT INPUTS AND OUTPUTS■ ..
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74VCX16374TTR
LOW VOLTAGE 16-BIT D-TYPE FLIP FLOP (3-STATE) WITH 3.6V TOLERANT INPUTS AND OUTPUTS
1/12February 2003 3.6V TOLERANT INPUTS AND OUTPUTS HIGH SPEED:
tPD= 3.0ns (MAX.)at VCC =3.0to 3.6VPD= 3.4ns (MAX.)atVCC =2.3to 2.7V
tPD= 6.8ns (MAX.)at VCC =1.8V POWER DOWN PROTECTION ON INPUTS
AND OUTPUTS SYMMETRICAL OUTPUT IMPEDANCE:OH|=IOL= 24mA (MIN)atVCC =3.0VOH|=IOL= 18mA (MIN)atVCC =2.3VOH|=IOL =6mA (MIN)atVCC =1.8V OPERATING VOLTAGE RANGE:CC (OPR)= 1.8Vto 3.6V PIN AND FUNCTION COMPATIBLE WITH SERIES 16374 LATCH-UP PERFORMANCE EXCEEDS
300mA (JESD 17) ESD PERFORMANCE:
HBM> 2000V (MIL STD 883 method 3015);> 200V
DESCRIPTIONThe 74VCX16374isa low voltage CMOS16 BIT
D-TYPE FLIP-FLOP with3 STATE OUTPUTS
NON INVERTING fabricated with sub-micron
silicon gate and five-layer metal wiringC2 MOS
technology.Itis ideal for low power and very high
speed 1.8to 3.6V applications;it canbe interfaced 3.6V signal environment for both inputs and
outputs.
These 16 bit D-TYPE flip-flops are controlled by
two clock inputs (nCK) and two output enable
inputs (nOE). thepositivetransitionof the (nCK), thenQ
outputs will be setto the logic state that were
setupat the nD inputs.
While the (nOE) inputis low, the8 outputs (nQ)
willbeina normal state (HIGHor LOW logic level)
and while high level the outputs will beina high
impedance state.
Any output control does not affect the internal
operationof flip flops; thatis, the old data canbe
retainedor the new data can be entered even
while the outputs are off.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
74VCX16374LOW VOLTAGE CMOS 16-BIT D-TYPE FLIP-FLOP (3-STATE)
WITH 3.6V TOLERANT INPUTS AND OUTPUTS
ORDER CODES
PIN CONNECTION
74VCX163742/12
INPUT AND OUTPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
TRUTH TABLE: Don‘t Care: High Impedance
IEC LOGIC SYMBOLS
74VCX163743/12
LOGIC DIAGRAMThis logic diagramhasnottobe usedto estimate propagation delays
ABSOLUTE MAXIMUM RATINGSAbsoluteMaximum Ratingsare those values beyond which damagetothe device mayoccur.Functional operation under these conditionsis
not impliedIO absolute maximum rating mustbe observedVO
VCC
RECOMMENDED OPERATING CONDITIONSVIN from 0.8Vto2Vat VCC =3.0V
74VCX16374
4/12 SPECIFICATIONS (2.7V74VCX16374
5/12 SPECIFICATIONS (2.3V SPECIFICATIONS (1.8V< VCC< 2.3V unless otherwise specified)
74VCX16374
6/12
DYNAMIC SWITCHING CHARACTERISTICS (Ta= 25°C, Inputtr=tf= 2.0ns,CL= 30pF,RL= 500Ω) Numberof outputs definedas"n". Measured with "n-1" outputs switching from HIGHto LOWor LOWto HIGH. The remaining outputis
measuredinthe LOW state. Numberof outputs definedas"n". Measured with "n-1" outputs switching from HIGHto LOWor LOWto HIGH. The remaining outputis
measuredinthe HIGH state. Parameters guaranteedby design. ELECTRICAL CHARACTERISTICS (CL= 30pF, RL= 500Ω, Inputtr =tf= 2.0ns) Skewis defined astheabsolute value ofthedifference betweenthe actual propagation delayfor anytwo outputsofthe samedevice switch-
inginthe same direction, either HIGHor LOW (tOSLH =|tPLHm -tPLHn|, tOSHL =|tPHLm -tPHLn|) Parameter guaranteedby design
