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74VCX162839FSCN/a2avaiLow Voltage 20-Bit Selectable Register/Buffer with 3.6V Tolerant Inputs/Outputs and 26-Ohm Series Resistors in the Outputs


74VCX162839 ,Low Voltage 20-Bit Selectable Register/Buffer with 3.6V Tolerant Inputs/Outputs and 26-Ohm Series Resistors in the OutputsFunctional DescriptionThe 74VCX162839 consists of twenty selectable non-inverting buffers or regist ..
74VCX162839MTD ,Low Voltage 20-Bit Selectable Register/Buffer with 3.6V Tolerant Inputs and Outputs and 26 Ohm Series Resistors in the OutputsFunctional DescriptionThe 74VCX162839 consists of twenty selectable non-inverting buffers or regist ..
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74VCX162839
Low Voltage 20-Bit Selectable Register/Buffer with 3.6V Tolerant Inputs/Outputs and 26-Ohm Series Resistors in the Outputs
74VCX162839 Low Voltage 20-Bit Selectable Register/Buffer with 3.6V Tolerant Inputs/Outputs and 26Ω Series Resistors in the Outputs March 1998 Revised December 2000 74VCX162839 Low Voltage 20-Bit Selectable Register/Buffer with 3.6V Tolerant Inputs/Outputs and 26Ω Series Resistors in the Outputs General Description Features The VCX162839 contains twenty non-inverting selectableCompatible with PC100 and PC133 DIMM module buffered or registered paths. The device can be configured specifications to operate in a registered, or flow through buffer mode by1.65V–3.6V V supply operation CC utilizing the register enable (REGE) and Clock (CLK) sig- 3.6V tolerant inputs and outputs nals. The device operates in a 20-bit word wide mode. All 26Ω series resistors in the outputs outputs can be placed into 3-STATE through use of the OE pin. These devices are ideally suited for buffered or regis-t (CLK to O ) PD n tered 168 pin and 200 pin SDRAM DIMM memory mod- 4.1 ns max for 3.0V to 3.6V V CC ules. 5.8 ns max for 2.3V to 2.7V V CC The 74VCX162839 is designed for low voltage (1.65V to 3.6V) V applications with I/O compatibility up to 3.6V. 9.8 ns max for 1.65V to 1.95V V CC CC The 74VCX162839 is also designed with 26Ω series resis-Power-off high impedance inputs and outputs tors in the outputs. This design reduces line noise in appli- Supports live insertion and withdrawal (Note 1) cations such as memory address drivers, clock drivers, and Static Drive (I /I ) OH OL bus transceivers/transmitters. ±12 mA @ 3.0V V The 74VCX162839 is fabricated with an advanced CMOS CC technology to achieve high speed operation while maintain- ±8 mA @ 2.3V V CC ing low CMOS power dissipation. ±3 mA @ 1.65V V CC Uses patented noise/EMI reduction circuitry Latch-up performance exceeds 300 mA ESD performance: Human body model > 2000V Machine model > 200V Note 1: To ensure the high-impedance state during power up or power down, OE should be tied to V through a pull-up resistor; the minimum CC value of the resistor is determined by the current-sourcing capability of the driver. Ordering Code: Order Number Package Number Package Description 74VCX162839MTD MTD56 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Logic Symbol Pin Descriptions Pin Names Description OE Output Enable Input (Active LOW) I –I Inputs 0 19 O –O Outputs 0 19 CLK Clock Input REGE Register Enable Input © 2000 DS500127
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