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74VCX162827MTDFAIRCHILDN/a1avaiLow Voltage 20-Bit Buffer/Line Driver with 3.6V Tolerant Inputs and Outputs and 26 Ohm Series Resistors in the Outputs
74VCX162827MTDXFAIN/a113avaiLow Voltage 20-Bit Buffer/Line Driver with 3.6V Tolerant Inputs and Outputs and 26 Ohm Series Resistors in the Outputs


74VCX162827MTDX ,Low Voltage 20-Bit Buffer/Line Driver with 3.6V Tolerant Inputs and Outputs and 26 Ohm Series Resistors in the OutputsFunctional DescriptionThe 74VCX162827 contains twenty non-inverting bufferswith 3-STATE outputs. Th ..
74VCX162835MTD ,Low Voltage 18-Bit Universal Bus Driver with 3.6V Tolerant Inputs/Outputs and 26 Ohm Series Resistors in Outputsapplications with I/O capability up to 3.6V.CC

74VCX162827MTD-74VCX162827MTDX
Low Voltage 20-Bit Buffer/Line Driver with 3.6V Tolerant Inputs and Outputs and 26 Ohm Series Resistors in the Outputs
74VCX162827 Low Voltage 20-Bit Buffer/Line Driver with 3.6V Tolerant Inputs and Outputs and 26Ω Series Resistors in the Outputs March 1998 Revised October 2004 74VCX162827 Low Voltage 20-Bit Buffer/Line Driver with 3.6V Tolerant Inputs and Outputs and 26Ω Series Resistors in the Outputs General Description Features The VCX162827 contains twenty non-inverting buffers with1.4V–3.6V V supply operation CC 3-STATE outputs to be employed as a memory and 3.6V tolerant inputs and outputs address driver, clock driver, or bus oriented transmitter/ 26Ω series resistors in outputs receiver. The device is byte controlled. Each byte has NOR t output enables for maximum control flexibility. PD The 74VCX162827 is designed for low voltage (1.4V to 3.4 ns max for 3.0V to 3.6V V CC 3.6V) V applications with I/O capability up to 3.6V. The CCPower-off high impedance inputs and outputs VCX162827 is also designed with 26Ω resistors in the out- Supports live insertion and withdrawal (Note 1) puts. Static Drive (I /I ) OH OL The 74VCX162827 is fabricated with an advanced CMOS ±12 mA @ 3.0V V technology to achieve high speed operation while maintain- CC ing low CMOS power dissipation.Uses patented noise/EMI reduction circuitry Latch-up performance exceeds 300 mA ESD performance: Human body model > 2000V Machine model > 200V Note 1: To ensure the high-impedance state during power up or power down, OE should be tied to V through a pull-up resistor; the minimum CC value of the resistor is determined by the current-sourcing capability of the driver. Ordering Code: Order Number Package Number Package Description 74VCX162827MTD MTD56 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Devices also available in Tape and Reel. Specify by appending the suffix “X” to the ordering code. Logic Symbol Pin Descriptions Pin Names Description OE Output Enable Input (Active LOW) n I –I Inputs 0 19 O –O Outputs 0 19 © 2004 DS500138
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