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74VCX162245MTDFAIRCHILN/a140avaiLow Voltage 16-Bit Bidirectional Transceiver with 3.6V Tolerant Inputs and Outputs and 26 Ohm Series Resistors in A Port Outputs


74VCX162245MTD ,Low Voltage 16-Bit Bidirectional Transceiver with 3.6V Tolerant Inputs and Outputs and 26 Ohm Series Resistors in A Port Outputsapplications. The device is byte controlled. Each

74VCX162245MTD
Low Voltage 16-Bit Bidirectional Transceiver with 3.6V Tolerant Inputs and Outputs and 26 Ohm Series Resistors in A Port Outputs
74VCX162245 Low Voltage 16-Bit Bidirectional Transceiver with 3.6V Tolerant Inputs and Outputs and 26Ω Series Resistors in A Port Outputs October 1996 Revised October 2004 74VCX162245 Low Voltage 16-Bit Bidirectional Transceiver with 3.6V Tolerant Inputs and Outputs and 26Ω Series Resistors in A Port Outputs General Description Features The VCX162245 contains sixteen non-inverting bidirec-1.4V to 3.6V V supply operation CC tional buffers with 3-STATE outputs and is intended for bus 3.6V tolerant inputs and outputs oriented applications. The device is byte controlled. Each 26Ω series resistors in A port outputs byte has separate 3-STATE control inputs which can be t (B to A) shorted together for full 16-bit operation. The T/R inputs PD determine the direction of data flow through the device. 3.4 ns max for 3.0V to 3.6V V CC The OE inputs disable both the A and B ports by placing Power-down high impedance inputs and outputs them in a high impedance state. Supports live insertion/withdrawal (Note 1) The 74VCX162245 is designed for low voltage (1.4V to Static Drive (I /I A outputs) 3.6V) V applications with I/O compatibility up to 3.6V. OH OL CC The 74VCX162245 is also designed with 26Ω series resis- ±12 mA @ 3.0V V CC tance in the A Port outputs. This design reduces line noise Uses patented noise/EMI reduction circuitry in applications such as memory address drivers, clock driv- Latchup performance exceeds 300 mA ers, and bus transceivers/transmitters. ESD performance: The 74VCX162245 is fabricated with an advanced CMOS Human body model > 2000V technology to achieve high speed operation while maintain- ing low CMOS power dissipation. Machine model >200V Note 1: To ensure the high-impedance state during power up or power down, OE should be tied to V through a pull-up resistor; the minimum CC value of the resistor is determined by the current-sourcing capability of the driver. Ordering Code: Order Number Package Number Package Description 74VCX162245MTD MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbol Pin Descriptions Pin Description Names OE Output Enable Input n T/R Transmit/Receive Input n A –A Side A Inputs or 3-STATE Outputs 0 15 B –B Side B Inputs or 3-STATE Outputs 0 15 © 2004 DS500048
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