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74V2G00STRSTN/a1400avaiDUAL 2-INPUT NAND GATE


74V2G00STR ,DUAL 2-INPUT NAND GATEABSOLUTE MAXIMUM RATINGS Symbol Parameter² Value UnitV Supply Voltage-0.5 to +7.0 VCCV DC Inpu ..
74V2G02STR ,DUAL 2-INPUT NOR GATEAbsolute Maximum Ratings are those values beyond which damage to the device may occur. Functional o ..
74V2G03STR ,DUAL 2-INPUT OPEN DRAIN NAND GATE74V2G03DUAL 2-INPUT OPEN DRAIN NAND GATEPRELIMINARY DATA ■ HIGH SPEED: t = 3.9ns (TYP.) at V = 5VP ..
74V2G04STR ,TRIPLE INVERTERAbsolute Maximum Ratings are those values beyond which damage to the device may occur. Functional o ..
74V2G05STR ,TRIPLE INVERTER (OPEN DRAIN)74V2G05TRIPLE INVERTER (OPEN DRAIN)PRELIMINARY DATA ■ HIGH SPEED: t = 3.7ns (TYP.) at V = 5VPD CC■ ..
74V2G08STR ,DUAL 2-INPUT AND GATEAbsolute Maximum Ratings are those values beyond which damage to the device may occur. Functional o ..
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74V2G00STR
DUAL 2-INPUT NAND GATE
1/9November 2001 HIGH SPEED: tPD = 3.7ns (TYP.) at VCC = 5V LOW POWER DISSIPATION:CC = 1μA(MAX.) at TA =25°C HIGH NOISE IMMUNITY:
VNIH = VNIL = 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUTS SYMMETRICAL OUTPUT IMPEDANCE:OH| = IOL = 8mA (MIN) BALANCED PROPAGATION DELAYS:
tPLH ≅ tPHL OPERATING VOLTAGE RANGE:
VCC(OPR) = 2V to 5.5V IMPROVED LATCH-UP IMMUNITY
DESCRIPTION

The V2G00 is an advanced high-speed CMOS
SINGLE 2-INPUT NAND GATE fabricated with
sub-micron silicon gate and double-layer metal
wiring C2 MOS tecnology.
The internal circuit is composed of 3 stages
including buffer output, which provide high noise
immunity and stable output.
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage. This device can be
used to interface 5V to 3V.
74V2G00

DUAL 2-INPUT NAND GATE
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
PRELIMINARY DATA
74V2G00
2/9
INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
TRUTH TABLE
ABSOLUTE MAXIMUM RATINGS

Absolute Maximum Rating are those value beyond which damage to the device may occour. Functional operation under these condition is
not implied
RECOMMENDED OPERATING CONDITIONS

1) VIN from 30% to 70% of VCC
74V2G00
3/9
DC SPECIFICATION
AC ELECTRICAL CHARACTERISTICS (Input t
r = tf = 3ns)
(*) Voltage range is 3.3V ± 0.3V
(**) Voltage range is 5.0V ± 0.5V
CAPACITANCE CHARACTERISTICS

1) CPD is defined as the value of the IC’s internal equivqlent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average current cqn be obtqined by the following equation. ICC(opr) = CPD x VCC x fIN + ICC
74V2G00
4/9
TEST CIRCUIT

CL = 50pF or equivalent (includes jig and probe capacitance)
RL = R1 = 500Ω or equivalent
RT = ZOUT of pulse generator (typically 50Ω)
WAVEFORM: PROPAGATION DELAY (f=1MHz; 50% duty cycle)
74V2G00
5/9
74V2G00
6/9
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