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74LX1G08CTRTRIALN/a1212avaiLOW VOLTAGE CMOS SINGLE 2-INPUT AND GATE WITH 5V TOLERANT INPUT
74LX1G08STRSTN/a32000avaiLOW VOLTAGE CMOS SINGLE 2-INPUT AND GATE WITH 5V TOLERANT INPUT


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74LX1G08CTR-74LX1G08STR
LOW VOLTAGE CMOS SINGLE 2-INPUT AND GATE WITH 5V TOLERANT INPUT
1/10October 2002 5V TOLERANT INPUTS HIGH SPEED:tPD= 4.5ns (MAX.)at VCC =3V LOW POWER DISSIPATION:
ICC =1μA(MAX.)atTA =25°C POWER DOWN PROTECTIONON INPUTS
AND OUTPUTS SYMMETRICAL OUTPUT IMPEDANCE:
|IOH|=IOL= 24mA (MIN)at VCC =3V BALANCED PROPAGATION DELAYS:PLH≅tPHL OPERATING VOLTAGE RANGE:CC (OPR)= 1.65Vto 5.5V
(1.2V Data Retention) IMPROVED LATCH-UP IMMUNITY
DESCRIPTION

The 74LX1G08isa low voltage CMOS SINGLE
2-INPUT AND GATE fabricated with sub-micron
silicon gate and double-layer metal wiringC2 MOS
tecnology.is idealfor 1.65to5.5VCC operations and low
power and low noise applications. The internal
circuitis composedof3 stages including buffer
output, which provide high noise immunity and
stable output.
Power downprotectionis providedoninput and
output and0to7V canbe acceptedon inputs with regardto the supply voltage.It can be
interfacedto5V signal environmentfor inputsin
mixed 3.3/5V system.
All inputs and outputs are equipped with
protection circuits against static discharge.
74LX1G08

LOW VOLTAGE CMOS SINGLE 2-INPUT AND GATE
WITH 5V TOLERANT INPUT
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
74LX1G08
2/10
INPUT AND OUTPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION TRUTH TABLE
ABSOLUTE MAXIMUM RATINGS

AbsoluteMaximum Ratingsare those values beyond which damagetothe devicemay occur. Functional operationunder these conditionsis
not impliedIO absolute maximum rating mustbe observedVO VCC
74LX1G08
3/10
RECOMMENDED OPERATING CONDITIONS Truth Table guaranteed:1.2Vto3.6VVINfrom0.8Vto2VatVCC =3.0V SPECIFICATIONS
74LX1G08
4/10 ELECTRICAL CHARACTERISTICS
CAPACITANCE CHARACTERISTICS
CPDis definedasthe valueoftheIC’s internal equivalent capacitance whichis calculatedfromthe operating current consumption without
load. (RefertoTest Circuit). Average currentcanbe obtainedbythe following equation. ICC(opr) =CPD xVCCxfIN +ICC
74LX1G08
5/10
TEST CIRCUIT
=ZOUTof pulse generator (typically50Ω)
TEST CIRCUIT AND WAVEFORM SYMBOL VALUE
WAVEFORM: PROPAGATION DELAY
(f=1MHz; 50% duty cycle)

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