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74LVTH162374FAIRCHILDN/a400avaiLow Voltage 16-Bit D-Type Flip-Flop with 3-STATE Outputs and 25-Ohm Series Resistors in the Outputs
74LVTH162374FAIN/a47avaiLow Voltage 16-Bit D-Type Flip-Flop with 3-STATE Outputs and 25-Ohm Series Resistors in the Outputs
74LVTH162374TIN/a20avaiLow Voltage 16-Bit D-Type Flip-Flop with 3-STATE Outputs and 25-Ohm Series Resistors in the Outputs


74LVTH162374 ,Low Voltage 16-Bit D-Type Flip-Flop with 3-STATE Outputs and 25-Ohm Series Resistors in the Outputsapplications, but with the capability to provide a TTL inter-Machine model > 200Vface to a 5V envir ..
74LVTH162374 ,Low Voltage 16-Bit D-Type Flip-Flop with 3-STATE Outputs and 25-Ohm Series Resistors in the Outputsapplications such asmake external termination resistors unnecessary andmemory address drivers, cloc ..
74LVTH162374 ,Low Voltage 16-Bit D-Type Flip-Flop with 3-STATE Outputs and 25-Ohm Series Resistors in the Outputsapplications. The device is byte controlled. A buff-

74LVTH162374
Low Voltage 16-Bit D-Type Flip-Flop with 3-STATE Outputs and 25-Ohm Series Resistors in the Outputs
74LVTH162374 Low Voltage 16-Bit D-Type Flip-Flop with 3-STATE Outputs and 25Ω Series Resistors in the Outputs June 2000 Revised August 2001 74LVTH162374 Low Voltage 16-Bit D-Type Flip-Flop with 3-STATE Outputs and 25Ω Series Resistors in the Outputs General Description Features The LVTH162374 contains sixteen non-inverting D-typeInput and output interface capability to systems at flip-flops with 3-STATE outputs and is intended for bus ori- 5V V CC ented applications. The device is byte controlled. A buff- Bushold data inputs eliminate the need for external ered clock (CP) and Output Enable (OE) are common to pull-up resistors to hold unused inputs each byte and can be shorted together for full 16-bit opera- Live insertion/extraction permitted tion. Power Up/Power Down high impedance provides The LVTH162374 is designed with equivalent 25Ω series glitch-free bus loading resistance in both the HIGH and LOW states of the output. Outputs include equivalent series resistance of 25Ω to This design reduces line noise in applications such as make external termination resistors unnecessary and memory address drivers, clock drivers, and bus transceiv- reduce overshoot and undershoot ers/transmitters. Functionally compatible with the 74 series 16374 The LVTH162374 data inputs include bushold, eliminating the need for external pull-up resistors to hold unusedLatch-up performance exceeds 500 mA inputs. ESD performance: These flip-flops are designed for low-voltage (3.3V) V CC Human-body model > 2000V applications, but with the capability to provide a TTL inter- Machine model > 200V face to a 5V environment. The LVTH162374 is fabricated Charged-device model > 1000V with an advanced BiCMOS technology to achieve high Also packaged in plastic Fine-Pitch Ball Grid Array speed operation similar to 5V ABT while maintaining a low (FBGA) (Preliminary) power dissipation. Ordering Code: Package Order Number Package Description Number 74LVTH162374GX BGA54A 54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide (Note 1) (Preliminary) [TAPE and REEL] 74LVTH162374MEA MS48A 48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide [TUBES] 74LVTH162374MEX MS48A 48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide [TAPE and REEL] 74LVTH162374MTD MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide [TUBES] 74LVTH162374MTX MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide [TAPE and REEL] Note 1: BGA package available in Tape and Reel only. © 2001 DS500355
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