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74LVT16374MEA-74LVT16374MEAX-74LVT16374MTD-74LVT16374MTDX-74LVTH16374MEAX Fast Delivery,Good Price
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74LVT16374MEAFSCN/a107avaiLow Voltage 16-Bit D Flip-Flop with 3-STATE Outputs
74LVT16374MEAXFAIRCHILN/a319avaiLow Voltage 16-Bit D Flip-Flop with 3-STATE Outputs
74LVT16374MTDFAIRCHILN/a705avaiLow Voltage 16-Bit D Flip-Flop with 3-STATE Outputs
74LVT16374MTDXFAIRCHILDN/a134avaiLow Voltage 16-Bit D Flip-Flop with 3-STATE Outputs
74LVT16374MTDXFAIN/a128avaiLow Voltage 16-Bit D Flip-Flop with 3-STATE Outputs
74LVTH16374MEAXFAIN/a4avaiLow Voltage 16-Bit D Flip-Flop with 3-STATE Outputs
74LVTH16374MTDFAIRCHILN/a170avaiLow Voltage 16-Bit D Flip-Flop with 3-STATE Outputs
74LVTH16374MTDXFAIRCHILDN/a1819avaiLow Voltage 16-Bit D Flip-Flop with 3-STATE Outputs


74LVTH16374MTDX ,Low Voltage 16-Bit D Flip-Flop with 3-STATE Outputsapplications. The device is byte controlled.

74LVT16374MEA-74LVT16374MEAX-74LVT16374MTD-74LVT16374MTDX-74LVTH16374MEAX-74LVTH16374MTD-74LVTH16374MTDX
Low Voltage 16-Bit D Flip-Flop with 3-STATE Outputs
74LVT16374 • 74LVTH16374 Low Voltage 16-Bit D-Type Flip-Flop with 3-STATE Outputs January 1999 Revised June 2002 74LVT16374  74LVTH16374 Low Voltage 16-Bit D-Type Flip-Flop with 3-STATE Outputs General Description Features The LVT16374 and LVTH16374 contain sixteen non-invert-Input and output interface capability to systems at ing D-type flip-flops with 3-STATE outputs and is intended 5V V CC for bus oriented applications. The device is byte controlled. Bushold data inputs eliminate the need for external A buffered clock (CP) and Output Enable (OE) are com- pull-up resistors to hold unused inputs (74LVTH16374), mon to each byte and can be shorted together for full 16-bit also available without bushold feature (74LVT16374) operation. Live insertion/extraction permitted The LVTH16374 data inputs include bushold, eliminating Power Up/Power Down high impedance provides the need for external pull-up resistors to hold unused glitch-free bus loading inputs. Outputs source/sink −32 mA/+64 mA These flip-flops are designed for low-voltage (3.3V) V CC Functionally compatible with the 74 series 16374 applications, but with the capability to provide a TTL inter- Latch-up performance exceeds 500 mA face to a 5V environment. The LVT16374 and LVTH16374 are fabricated with an advanced BiCMOS technology toESD performance: achieve high speed operation similar to 5V ABT while Human-body model > 2000V maintaining a low power dissipation. Machine model > 200V Charged-device model > 1000V Also packaged in plastic Fine-Pitch Ball Grid Array (FBGA) Ordering Code: Order Number Package Number Package Description 74LVT16374G BGA54A 54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide (Note 1)(Note 2) (Preliminary) 74LVT16374MEA MS48A 48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide (Note 2) 74LVT16374MTD MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide (Note 2) 74LVTH16374G BGA54A 54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide (Note 1)(Note 2) 74LVTH16374MEA MS48A 48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide (Note 2) 74LVTH16374MTD MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide (Note 2) Note 1: Ordering code “G” indicates Trays. Note 2: Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Logic Symbol © 2002 DS012022
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