IC Phoenix
 
Home ›  7724 > 74LVQ138MTR-74LVQ138TTR,3 TO 8 LINE DECODER (INVERTING)
74LVQ138MTR-74LVQ138TTR Fast Delivery,Good Price
Part Number:
If you need More Quantity or Better Price,Welcom Any inquiry.
We available via phone +865332716050 Email
Partno Mfg Dc Qty AvailableDescript
74LVQ138MTRSTN/a10000avai3 TO 8 LINE DECODER (INVERTING)
74LVQ138TTRST ?N/a2700avai3 TO 8 LINE DECODER (INVERTING)


74LVQ138MTR ,3 TO 8 LINE DECODER (INVERTING)Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional o ..
74LVQ138TTR ,3 TO 8 LINE DECODER (INVERTING)74LVQ1383 TO 8 LINE DECODER (INVERTING) ■ HIGH SPEED: t = 5.5ns (TYP.) at V = 3.3 VPD CC■ COMPATIB ..
74LVQ14 ,HEX SCHMITT INVERTERAbsolute Maximum Ratings are those values beyond which damage to the device may occur. Functional o ..
74LVQ14M ,HEX SCHMITT INVERTERAbsolute Maximum Ratings are those values beyond which damage to the device may occur. Functional o ..
74LVQ14MTR ,HEX SCHMITT INVERTERPin configuration and function are the same as■ PIN AND FUNCTION COMPATIBLE WITH those of the 74LVQ ..
74LVQ14SCX ,Low Voltage Hex Inverter with Schmitt Trigger Input
82S100/BXA , Field Programmable Logic Array
82S131 ,2K-bit TTL bipolar PROM
83021012A ,8-Bit Universal Shift/Storage Registers With 3-State Outputsmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage, V ..
83021AMILF , 1-TO-1 DIFFERENTIAL- TO-LVCMOS/LVTTL TRANSLATOR
8302401EA ,8302401EA · Hermetically Sealed, Low IF, Wide Vcc, High Gain OptocouplersfeaturesLife Critical Systems an open collector output providingThe connection of a 0.1 μF bypass c ..
83026AIL , LOW SKEW, 1-TO-2 DIFFERENTIAL-TO-LVCMOS/LVTTL FANOUT BUFFER


74LVQ138MTR-74LVQ138TTR
3 TO 8 LINE DECODER (INVERTING)
1/9July 2001 HIGH SPEED:
tPD = 5.5ns (TYP.) at VCC = 3.3 V COMPATIBLE WITH TTL OUTPUTS LOW POWER DISSIPATION:CC = 4 μA (MAX.) at TA =25°C LOW NOISE: OLP = 0.2V (TYP .) at VCC = 3.3V 75Ω TRANSMISSION LINE DRIVING
CAPABILITY SYMMETRICAL OUTPUT IMPEDANCE:OH | = IOL = 12mA (MIN) at VCC = 3.0 V PCI BUS LEVELS GUARANTEED AT 24 mA BALANCED PROPAGATION DELAYS:
tPLH ≅ tPHL OPERATING VOLTAGE RANGE:CC (OPR) = 2V to 3.6V (1.2V Data Retention) PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 138 IMPROVED LATCH-UP IMMUNITY
DESCRIPTION

The 74LVQ138 is a low voltage CMOS 3 TO 8
LINE DECODER (INVERTING) fabricated with
sub-micron silicon gate and double-layer metal
wiring C2 MOS technology. It is ideal for low power
and low noise 3.3V applications.
If the device is enabled, 3 binary select inputs (A,
B, and C) determine which one of the outputs will
go low. If enable input G1 is held low or either G2A
or G2B is held high, the decoding function is
inhibited and all the 8 outputs go to high.
Three enable inputs are provided to ease cascade
connection and application of address decoders
for memory systems.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
74LVQ138

3 TO 8 LINE DECODER (INVERTING)
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
74LVQ138
2/9
INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
TRUTH TABLE

X : Don’t Care
74LVQ138
3/9
LOGIC DIAGRAM

This logic diagram has not be used to estimate propagation delays
ABSOLUTE MAXIMUM RATINGS

Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied.
RECOMMENDED OPERATING CONDITIONS

1) Truth Table guaranteed: 1.2V to 3.6V
2) VIN from 0.8V to 2V
74LVQ138
4/9
DC SPECIFICATIONS

1) Maximum test duration 2ms, one output loaded at time
2) Incident wave switching is guaranteed on transmission lines with impedances as low as 75Ω
DYNAMIC SWITCHING CHARACTERISTICS

1) Worst case package.
2) Max number of outputs defined as (n). Data inputs are driven 0V to 3.3V, (n-1) outputs switching and one output at GND.
3) Max number of data inputs (n) switching. (n-1) switching 0V to 3.3V. Inputs under test switching: 3.3V to threshold (VILD), 0V to threshold
(VIHD), f=1MHz.
74LVQ138
5/9
AC ELECTRICAL CHARACTERISTICS (C
L = 50 pF, RL = 500 Ω, Input tr = tf = 3ns)
1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switch-
ing in the same direction, either HIGH or LOW (tOSLH = |tPLHm - tPLHn|, tOSHL = |tPHLm - tPHLn|)
2) Parameter guaranteed by design
(*) Voltage range is 3.3V ± 0.3V
CAPACITIVE CHARACTERISTICS

1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC
TEST CIRCUIT

CL = 50pF or equivalent (includes jig and probe capacitance)
RL = 500Ω or equivalent
RT = ZOUT of pulse generator (typically 50Ω)
74LVQ138
6/9
WAVEFORM 1 : PROPAGATION DELAYS FOR INVERTING OUTPUTS
(f=1MHz; 50% duty cycle)
WAVEFORM 2: PROPAGATION DELAYS FOR NON-INVERTING OUTPUTS (f=1MHz; 50% duty

cycle)
ic,good price


TEL:86-533-2716050      FAX:86-533-2716790
   

©2020 IC PHOENIX CO.,LIMITED