74LVC2GU04GW Fast Delivery |IC PHOENIX CO.,LIMITED

74LVC2GU04GW ,Dual inverterFeatures and benefits Wide supply voltage range from 1.65 V to 5.5 V 5 V tolerant input/output fo ..
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74LVC2GU04GW
Dual inverter
1. General description
The 74LVC2GU04 provides two inverters. Each inverter is a single stage with unbuffered
output.
The inputs can be driven from either 3.3Vor5 V devices. This feature allows the use of
this device in a mixed 3.3V and5 V environment.
2. Features and benefits Wide supply voltage range from 1.65Vto 5.5V 5 V tolerant input/output for interfacing with 5 V logic High noise immunity ESD protection: HBM JESD22-A114F exceeds 2000V MM JESD22-A115-A exceeds 200 V 24 mA output drive (VCC =3.0V) CMOS low power consumption Latch-up performance exceeds 250 mA Input accepts voltages up to 5V Multiple package options Specified from 40 Cto+85 C and 40 Cto +125 C
3. Ordering information
74L VC2GU04
Dual inverter
Rev. 8 — 3 July 2012 Product data sheet
Table 1. Ordering information
74LVC2GU04GW 40 Cto+125C SC-88 plastic surface-mounted package; 6 leads SOT363
74LVC2GU04GV 40 Cto+125C TSOP6 plastic surface-mounted package (TSOP6); leads
SOT457
74LVC2GU04GM 40 Cto+125C XSON6 plastic extremely thin small outline package; leads; 6 terminals; body 1 1.45 0.5 mm
SOT886
74LVC2GU04GF 40 C to +125 C XSON6 plastic extremely thin small outline package; leads; 6 terminals; body 11 0.5 mm
SOT891
74LVC2GU04GN 40 C to +125C XSON6 extremely thin small outline package; no leads; terminals; body 0.9 1.0 0.35 mm
SOT1115
74LVC2GU04GS 40 C to +125C XSON6 extremely thin small outline package; no leads; terminals; body 1.0 1.0 0.35 mm
SOT1202
NXP Semiconductors 74LVC2GU04
Dual inverter
4. Marking
[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.
5. Functional diagram
6. Pinning information
6.1 Pinning
Table 2. Marking codes
74LVC2GU04GW YD
74LVC2GU04GV VU4
74LVC2GU04GM YD
74LVC2GU04GF YD
74LVC2GU04GN YD
74LVC2GU04GS YD
NXP Semiconductors 74LVC2GU04
Dual inverter
6.2 Pin description
7. Functional description
[1] H = HIGH voltage level; L = LOW voltage level.
8. Limiting values
[1] The minimum input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] When VCC=0 V (Power-down mode), the output voltage can be 5.5 V in normal operation.
[3] For SC-88 and SC-74 packages: above 87.5 C the value of Ptot derates linearly with 4.0 mW/K.
For XSON6 packages: above 118 C the value of Ptot derates linearly with 7.8 mW/K.
Table 3. Pin description 1 data input
GND 2 ground (0V) 3 data input 4 data output
VCC 5 supply voltage 6 data output
Table 4. Function table[1]
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
VCC supply voltage 0.5 +6.5 V
IIK input clamping current VI < 0 V 50 - mA input voltage [1] 0.5 +6.5 V
IOK output clamping current VO < 0 V 50 - mA output voltage Active mode [1][2] 0.5 VCC + 0.5 V output current VO = 0 V to VCC - 50 mA
ICC supply current - 100 mA
IGND ground current 100 - mA
Tstg storage temperature 65 +150 C
Ptot total power dissipation Tamb = 40 C to +125C [3]- 250 mW
NXP Semiconductors 74LVC2GU04
Dual inverter
9. Recommended operating conditions
10. Static characteristics
Table 6. Recommended operating conditions
Voltages are referenced to GND (ground = 0 V).
VCC supply voltage 1.65 - 5.5 V input voltage 0 - 5.5 V output voltage Active mode 0 - VCC V
Tamb ambient temperature 40 - +125 C
t/V input transition rise and fall rate VCC = 1.65 V to 2.7 V - - 20 ns/V
VCC = 2.7 V to 5.5 V - - 10 ns/V
Table 7. Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Tamb = 40 C to +85 C[1]
VIH HIGH-level input voltage VCC = 1.65 V to 5.5 V 0.75 VCC -- V
VIL LOW-level input voltage VCC = 1.65 V to 5.5 V - - 0.25 VCC V
VOH HIGH-level output voltage VI = VIH or VIL = 100 A;
VCC= 1.65Vto 5.5 V
VCC 0.1 - - V = 4 mA; VCC= 1.65 V 1.2 - - V = 8 mA; VCC= 2.3 V 1.9 - - V = 12 mA; VCC= 2.7 V 2.2 - - V = 24 mA; VCC= 3.0 V 2.3 - - V = 32 mA; VCC= 4.5 V 3.8 - - V
VOL LOW-level output voltage VI = VIH or VIL = 100 A;
VCC= 1.65Vto 5.5 V 0.1 V = 4 mA; VCC =1.65 V - - 0.45 V = 8 mA; VCC= 2.3 V - - 0.3 V = 12 mA; VCC= 2.7 V - - 0.4 V = 24 mA; VCC= 3.0 V - - 0.55 V = 32 mA; VCC= 4.5 V - - 0.55 V input leakage current VI = 5.5 V or GND;
VCC =0 Vto 5.5V
[2]- 0.1 5 A
ICC supply current VI = 5.5 V or GND; IO = 0 A;
VCC= 1.65Vto 5.5 V
-0.1 10 A input capacitance VCC =3.3 V; VI = GND to VCC -5 -pF
NXP Semiconductors 74LVC2GU04
Dual inverter
[1] All typical values are measured at Tamb = 25 C.
[2] These typical values are measured at VCC =3.3V.
Tamb = 40 C to +125 C
VIH HIGH-level input voltage VCC = 1.65 V to 5.5 V 0.8 VCC -- V
VIL LOW-level input voltage VCC = 1.65 V to 5.5 V - - 0.2 VCC V
VOH HIGH-level output voltage VI = VIH or VIL = 100 A;
VCC= 1.65Vto 5.5 V
VCC 0.1 - - V = 4 mA; VCC= 1.65 V 0.95 - - V = 8 mA; VCC= 2.3 V 1.7 - - V = 12 mA; VCC= 2.7 V 1.9 - - V = 24 mA; VCC= 3.0 V 2.0 - - V = 32 mA; VCC= 4.5 V 3.4 - - V
VOL LOW-level output voltage VI = VIH or VIL = 100 A;
VCC= 1.65Vto 5.5 V 0.1 V = 4 mA; VCC =1.65 V - - 0.7 V = 8 mA; VCC= 2.3 V - - 0.45 V = 12 mA; VCC= 2.7 V - - 0.6 V = 24 mA; VCC= 3.0 V - - 0.8 V = 32 mA; VCC= 4.5 V - - 0.8 V input leakage current VI = 5.5 V or GND;
VCC =0 Vto 5.5V 20 A
ICC supply current VI = 5.5 V or GND; IO = 0 A;
VCC= 1.65Vto 5.5 V 40 A
Table 7. Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
NXP Semiconductors 74LVC2GU04
Dual inverter
11. Dynamic characteristics
[1] Typical values are measured at Tamb =25 C and VCC = 1.8 V, 2.5 V, 2.7 V, 3.3 V and 5.0 V respectively.
[2] tpd is the same as tPLH and tPHL.
[3] CPD is used to determine the dynamic power dissipation (PDin W). =CPD VCC2fi N+ (CL VCC2fo) where:= input frequency in MHz;= output frequency in MHz;= output load capacitance inpF;
VCC= supply voltage in V;= number of inputs switching;
(CL VCC2fo)= sum of outputs.
12. Waveforms
Table 8. Dynamic characteristics
Voltages are referenced to GND (ground=0 V). For test circuit see Figure8.
tpd propagation delay nA to nY; see Figure7 [2]
VCC = 1.65 V to 1.95 V 0.5 2.3 5.0 0.5 6.3 ns
VCC = 2.3 V to 2.7 V 0.3 1.8 4.0 0.3 5.0 ns
VCC = 2.7 V 0.3 2.6 4.5 0.3 5.6 ns
VCC = 3.0 V to 3.6 V 0.3 2.3 3.7 0.3 4.5 ns
VCC = 4.5 V to 5.5 V 0.3 1.7 3.0 0.3 3.8 ns
CPD power dissipation
capacitance
VI = GND to VCC; VCC= 3.3 V [3] -7.8 - pF
NXP Semiconductors 74LVC2GU04
Dual inverter
Table 9. Measurement points
1.65 V to 1.95V 0.5 VCC 0.5 VCC
2.3 V to 2.7V 0.5 VCC 0.5 VCC
2.7V 1.5V 1.5V
3.0V to 3.6V 1.5V 1.5V
4.5 V to 5.5V 0.5 VCC 0.5 VCC
Table 10. Test data
1.65 V to 1.95V VCC  2.0ns 30pF 1k open
2.3 V to 2.7V VCC  2.0ns 30pF 500 open
2.7V 2.7V  2.5ns 50pF 500 open
3.0V to 3.6V 2.7V  2.5ns 50pF 500 open
4.5 V to 5.5V VCC  2.5ns 50pF 500 open
NXP Semiconductors 74LVC2GU04
Dual inverter
NXP Semiconductors 74LVC2GU04
Dual inverter
13. Application information
Some applications are: Linear amplifier (see Figure 11) In crystal oscillator design (see Figure 12)
Remark: All values given are typical unless otherwise specified.
NXP Semiconductors 74LVC2GU04
Dual inverter
14. Package outline

Partno	Mfg	Dc	Qty	Available	Descript
74LVC2GU04GW	NXP	N/a	6000	avai	Dual inverter